STM32F103R8H7 STMicroelectronics, STM32F103R8H7 Datasheet - Page 95
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STM32F103R8H7
Manufacturer Part Number
STM32F103R8H7
Description
MCU 32BIT 64K FLASH 64BGA
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32F103R8H6.pdf
(99 pages)
Specifications of STM32F103R8H7
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
51
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LFBGA
Processor Series
STM32F103x
Core
ARM Cortex M3
3rd Party Development Tools
EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ST-LINK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32F103R8H7
Manufacturer:
STMicroelectronics
Quantity:
10 000
STM32F103x8, STM32F103xB
Table 60.
22-May-2008
14-Mar-2008
21-Mar-2008
Date
Document revision history (continued)
Revision
5
6
7
Figure 2: Clock tree on page 12
Maximum T
page
CRC feature added (see
unit on page 9
I
Stop and Standby
ACC
note 2 removed.
P
in
t
V
page
Table 42: SPI characteristics on page 69
I
Table 48: ADC accuracy - limited test conditions
accuracy
LQFP100 package specifications updated (see
characteristics on page
Recommended LQFP100, LQFP 64, LQFP48 and VFQFPN36
footprints added (see
Section 6.2: Thermal characteristics on page 88
Section 6.2.1
Appendix A: Important notes on page 81
Small text changes.
In
– N
– cycling conditions specified for t
– t
V
CRC feature removed.
CRC feature added back. Small text changes.
modified.
I
current consumptions in Stop and Standby modes on page
I
Standby mode on page
Values added to
3.3 V) on page
Figure 32: SPI timing diagram - slave mode and CPHA = 0 on page 70
modified.
t
data retention on page
V
Figure 54: LQFP100 PD max vs. TA on page 90
Axx option added to
page
DD
RET
VREF
DD
DD_VBAT
RET
D
NF(NRST)
25
USB
Table 28: Flash memory characteristics on page
Table 29: Flash memory endurance and data
, T
RET
Doc ID 13587 Rev 13
, Avg_Slope and T
modified in
END
at T
HSI
modified in
at T
A
36.
65.
91.
added to
added to
and T
min modified at T
A
modified in
tested over the whole temperature range
A
removed from
max = 105 °C added to
modified.
Section 2.2: Full compatibility throughout the family
Equation 1
= 105 °C modified in
unit corrected in
J
J
value given in
added, t
and
and
Table 16: Typical and maximum current consumptions in
Table 44: USB DC electrical characteristics on page
68.
Table 46: ADC characteristics on page
Table 29: Flash memory endurance and data
Table 41: SCL frequency (fPCLK1= 36 MHz.,VDD =
Section 6.2.2
modes.
Figure 10: Memory map on page 32
Table 24: HSI oscillator characteristics on page
Figure 10: Memory map
Table 59: Ordering information scheme on
corrected.
Figure
prog
L
56.
modified in
Table 21: Typical current consumption in
78).
A
47.
CRC (cyclic redundancy check) calculation
= 55 °C
values modified and t
Table 38: NRST pin characteristics on
Table 8: Thermal characteristics on
47,
Changes
Table 29: Flash memory endurance and
added.
added.
Figure
Table 16: Typical and maximum
RET
Table 50: TS
49,
modified.
removed.
Figure 53
clarified.
Section 1: Introduction
prog
Section 6: Package
retention:
added.
characteristics.
modified.
modified,
55.
description clarified
Revision history
and
73.
Table 49: ADC
for address).
Figure
43.
added.
retention.
41).
95/99
53,
72.