ST10F269Z2Q6 STMicroelectronics, ST10F269Z2Q6 Datasheet - Page 37

• Manufacturer Part Number: ST10F269Z2Q6
• Description: MCU 16BIT 256K FLASH 144PQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F269Z2Q6

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-QFP
• Controller Family/series: ST10
• No. Of I/o's: 111
• Ram Memory Size: 12KB
• Cpu Speed: 40MHz
• No. Of Timers: 5
• Embedded Interface Type: CAN, SSC, USART
• Rohs Compliant: Yes
• Processor Series: ST10F26x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SSC, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 2 x 16 bit
• Operating Supply Voltage: 0.3 V to 4 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit x 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-4833

6.2 - Instruction Set Summary
The Table 4 lists the instructions of the ST10F269-T3. The various addressing modes, instruction opera-
tion, parameters for conditional execution of instructions, opcodes and a detailed description of each
instruction can be found in the “ST10 Family Programming Manual”.
Table 4 : Instruction Set Summary
ADD(B)
ADDC(B)
SUB(B)
SUBC(B)
MUL(U)
DIV(U)
DIVL(U)
CPL(B)
NEG(B)
AND(B)
OR(B)
XOR(B)
BCLR
BSET
BMOV(N)
BAND, BOR, BXOR
BCMP
BFLDH/L
CMP(B)
CMPD1/2
CMPI1/2
PRIOR
SHL / SHR
ROL / ROR
ASHR
MOV(B)
MOVBS
MOVBZ
JMPA, JMPI, JMPR
JMPS
J(N)B
JBC
Mnemonic
Subtract word (byte) operands
(Un)Signed multiply direct GPR by direct GPR (16-16-bit)
(Un)Signed divide register MDL by direct GPR (16-/16-bit)
Complement direct word (byte) GPR
Negate direct word (byte) GPR
Bit-wise AND, (word/byte operands)
Clear direct bit
Set direct bit
Bit-wise modify masked high/low byte of bit-addressable direct word memory
Determine number of shift cycles to normalize direct word GPR and store result
Arithmetic (sign bit) shift right direct word GPR
Move word (byte) data
Jump relative if direct bit is (not) set
Jump relative and clear bit if direct bit is set
Add word (byte) operands
Add word (byte) operands with Carry
Subtract word (byte) operands with Carry
(Un)Signed long divide reg. MD by direct GPR (32-/16-bit)
Bit-wise OR, (word/byte operands)
Bit-wise XOR, (word/byte operands)
Move (negated) direct bit to direct bit
AND/OR/XOR direct bit with direct bit
Compare direct bit to direct bit
with immediate data
Compare word (byte) operands
Compare word data to GPR and decrement GPR by 1/2
Compare word data to GPR and increment GPR by 1/2
in direct word GPR
Shift left/right direct word GPR
Rotate left/right direct word GPR
Move byte operand to word operand with sign extension
Move byte operand to word operand with zero extension
Jump absolute/indirect/relative if condition is met
Jump absolute to a code segment
Description
ST10F269-T3
Bytes
2 / 4
2 / 4
2 / 4
2 / 4
2 / 4
2 / 4
2 / 4
2 / 4
2 / 4
2 / 4
2 / 4
2 / 4
2 / 4
37/162
2
2
4
2
4
2
2
2
2
2
4
4
4
2
2
2
4
4
4