COP8CCE9IMT7/NOPB National Semiconductor, COP8CCE9IMT7/NOPB Datasheet - Page 32

• Manufacturer Part Number: COP8CCE9IMT7/NOPB
• Description: MCU 8BIT FLASH 8K MEM 48-TSSOP
• Manufacturer: National Semiconductor
• Series: COP8™ 8Cr

Specifications of COP8CCE9IMT7/NOPB

• Core Processor: COP8
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: Microwire/Plus (SPI), UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-TSSOP
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 10 MHz
• Data Ram Size: 256 B
• On-chip Adc: 10 bit, 16 channel
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Height: 0.9 mm
• Interface Type: SPI, USART
• Length: 12.5 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 6.1 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: COP8CCE9IMT7

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cpgerase
cmserase
creadbf
cblockr
cwritebf
cblockw
exit
uwisp
Command/
11.0 In-System Programming
Label
Page Erase
Mass Erase
Read Byte
Block Read
Write Byte
Block Write
EXIT
MICROWIRE/
PLUS
ISP Start
Function
Entry Point
Command
0x1A
0x17
0x26
0x14
0x23
0x62
0x00
0x11
TABLE 11. User ISP/Virtual E
Register ISPADHI is loaded by the user
with the high byte of the address.
Register ISPADLO is loaded by the
user with the low byte of the address.
Accumulator A contains the
confirmation key 0x55.
Register ISPADHI is loaded by the user
with the high byte of the address.
Register ISPADLO is loaded by the
user with the low byte of the address.
Register ISPADHI is loaded by the user
with the high byte of the address.
Register ISPADLO is loaded by the
user with the low byte of the address.
X pointer contains the beginning RAM
address where the result(s) will be
returned.
Register BYTECOUNTLO contains the
number of n bytes to read
(0 ≤ n ≤ 255). It is up to the user to
setup the segment register.
Register ISPADHI is loaded by the user
with the high byte of the address.
Register ISPADLO is loaded by the
user with the low byte of the address.
Register ISPWR contains the Data
Byte to be written.
Register ISPADHI is loaded by the user
with the high byte of the address.
Register ISPADLO is loaded by the
user with the low byte of the address.
Register BYTECOUNTLO contains the
number of n bytes to write (0 ≤ n ≤ 16).
The combination of the
BYTECOUNTLO and the ISPADLO
registers must be set such that the
operation will not cross a 64 byte
boundary.
X pointer contains the beginning RAM
address of the data to be written.
It is up to the user to setup the
segment register.
N/A
N/A
(Continued)
Parameters
32
2
Entry Points
N/A (A page of memory beginning at
ISPADHI, ISPADLO will be erased)
N/A (The entire Flash Memory will be
erased)
Data Byte in Register ISPRD.
n Data Bytes, Data will be returned
beginning at a location pointed to by
the RAM address in X.
N/A
N/A
N/A (Device will Reset)
N/A (Device will be in
MICROWIRE/PLUS ISP Mode. Must be
terminated by MICROWIRE/PLUS ISP
EXIT command which will Reset the
device)
Return Data