MCF5272VM66J Freescale Semiconductor, MCF5272VM66J Datasheet - Page 32

• Manufacturer Part Number: MCF5272VM66J
• Description: IC MCU 166MHZ 196MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272VM66J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 196-MAPBGA
• Processor Series: MCF527x
• Core: ColdFire V2
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: I2C, UART, Ethernet, SPI, USB, QSPI
• Maximum Clock Frequency: 166 MHz
• Number Of Timers: 4
• Operating Supply Voltage: 1.4 V to 1.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table
Number
5-10
5-11
5-12
5-13
5-14
5-15
5-16
5-17
5-18
5-19
5-20
5-21
5-22
5-23
6-1
6-2
6-3
6-4
6-5
6-6
6-7
6-8
6-9
6-10
6-11
7-1
7-2
7-3
7-4
7-5
7-6
7-7
7-8
8-1
8-2
8-3
8-4
8-5
9-1
9-2
9-3
9-4
9-5
9-6
xxxii
DBMR Field Descriptions ...................................................................................................... 5-12
Access Size and Operand Data Location ............................................................................. 5-12
PBR Field Descriptions ......................................................................................................... 5-13
PBMR Field Descriptions ...................................................................................................... 5-13
TDR Field Descriptions ......................................................................................................... 5-14
Receive BDM Packet Field Description ................................................................................ 5-18
Transmit BDM Packet Field Description ............................................................................... 5-18
BDM Command Summary .................................................................................................... 5-19
BDM Field Descriptions......................................................................................................... 5-20
Control Register Map ............................................................................................................ 5-30
Definition of DRc Encoding—Read ....................................................................................... 5-32
DDATA[3:0]/CSR[BSTAT] Breakpoint Response ................................................................. 5-34
PST/DDATA Specification for User-Mode Instructions ......................................................... 5-37
PST/DDATA Specification for Supervisor-Mode Instructions................................................ 5-40
SIM Registers ......................................................................................................................... 6-3
SCR Field Descriptions ........................................................................................................... 6-5
SPR Field Descriptions ........................................................................................................... 6-6
PMR Field Descriptions........................................................................................................... 6-8
USB and USART Power Down Modes ................................................................................... 6-9
Exiting Sleep and Stop Modes .............................................................................................. 6-10
DIR Field Descriptions .......................................................................................................... 6-11
WRRR Field Descriptions ..................................................................................................... 6-12
WIRR Field Descriptions ....................................................................................................... 6-13
WER Field Descriptions ........................................................................................................ 6-13
Interrupt Controller Registers .................................................................................................. 7-2
Interrupt and Power Management Register Mnemonics......................................................... 7-3
ICR Field Descriptions ............................................................................................................ 7-4
ISR Field Descriptions............................................................................................................. 7-6
PITR Field Descriptions .......................................................................................................... 7-7
PIWR Field Descriptions ......................................................................................................... 7-8
PIVR Field Descriptions .......................................................................................................... 7-9
MCF5272 Interrupt Vector Table........................................................................................... 7-10
CSCR and CSOR Values after Reset ..................................................................................... 8-2
CSBRn Field Descriptions....................................................................................................... 8-3
Output Read/Write Strobe Levels versus Chip Select EBI Code ............................................ 8-4
Chip Select Memory Address Decoding Priority ..................................................................... 8-5
CSORn Field Descriptions ...................................................................................................... 8-5
SDRAM Controller Signal Descriptions................................................................................... 9-2
Connecting BS[3:0] to DQMx .................................................................................................. 9-4
Configurations for 16-Bit Data Bus.......................................................................................... 9-4
Configurations for 32-Bit Data Bus.......................................................................................... 9-4
Internal Address Multiplexing (16-Bit Data Bus) ..................................................................... 9-5
Internal Address Multiplexing (32-Bit Data Bus) ..................................................................... 9-5
MBAR Field Descriptions ....................................................................................................... 6-4
MCF5272 ColdFire
List of Tables (Continued)
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Integrated Microprocessor User’s Manual, Rev. 3
Title
Freescale Semiconductor
Number
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