MCF5272VM66J Freescale Semiconductor, MCF5272VM66J Datasheet - Page 358

• Manufacturer Part Number: MCF5272VM66J
• Description: IC MCU 166MHZ 196MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272VM66J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 196-MAPBGA
• Processor Series: MCF527x
• Core: ColdFire V2
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: I2C, UART, Ethernet, SPI, USB, QSPI
• Maximum Clock Frequency: 166 MHz
• Number Of Timers: 4
• Operating Supply Voltage: 1.4 V to 1.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Timer Module
15.3.2
Each TRR holds a 16-bit reference value that is compared with the free-running TCN as part of the output
compare function. A match occurs when TCN increments to equal TRR.
15.3.3
Each TCAP is used to latch the TCN value during a capture operation when an edge occurs on the
respective TIN0, TIN1, UART0_RxD, or UART1_RxD, as programmed in TMRn.
15.3.4
TCN registers are 16-bit up counters. Reading a TCNn gives the current counter value without affecting
counting. A write cycle to a TCN register causes it to be cleared.
15-4
Bits
0
Reset
Reset
Reset
Field
Field
Field
Addr
Addr
Addr
R/W
R/W
R/W
Name
RST
15
15
15
Timer Reference Registers (TRR0–TRR3)
Timer Capture Registers (TCAP0–TCAP3)
Timer Counters (TCN0–TCN3)
Reset timer.
0 A transition from 1 to 0 resets the timer. Other register values can be written. The counter/timer/prescaler
1 Enable timer
are not clocked unless the timer is enabled.
MCF5272 ColdFire
MBAR + 0x208 (TCAP0); 0x228 (TCAP1); 0x248 (TCAP2); 0x268 (TCAP3)
Figure 15-4. Timer Capture Registers (TCAP0–TCAP3)
Figure 15-3. Timer Reference Registers (TRR0–TRR3)
MBAR + 0x20C (TCN0); 0x22C (TCN1); 0x24C (TCN2); 0x26C (TCN3)
MBAR + 0x204 (TRR0); 0x224 (TRR1); 0x244 (TRR2); 0x264 (TRR3)
Table 15-1. TMRn Field Descriptions (continued)
Figure 15-5. Timer Counter (TCN0–TCN3)
®
Integrated Microprocessor User’s Manual, Rev. 3
COUNT (16-bit timer counter value)
CAP (16-bit capture counter value)
REF (16-bit reference value)
1111_1111_1111_1111
0000_0000_0000_0000
0000_0000_0000_0000
Read/Write
Read/Write
Read Only
Description
Freescale Semiconductor
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0
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