DF2372RVFQ34V Renesas Electronics America, DF2372RVFQ34V Datasheet - Page 633

IC H8S/2372 MCU FLASH 144LQFP

DF2372RVFQ34V

Manufacturer Part Number
DF2372RVFQ34V
Description
IC H8S/2372 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2372RVFQ34V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
34MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2372RVFQ34V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Table 11.17 TIORL_3
Bit 7
IOD3
0
1
Legend: ×: Don’t care
Notes: 1. When bits TPSC2 to TPSC0 in TCR_4 are set to B'000 and φ/1 is used as the TCNT_4
2. When the BFB bit in TMDR_3 is set to 1 and TGRD_3 is used as a buffer register, this
Bit 6
IOD2
0
1
0
1
count clock, this setting is invalid and input capture is not generated.
setting is invalid and input capture/output compare is not generated.
Bit 5
IOD1
0
1
0
1
0
1
×
Bit 4
IOD0
0
1
0
1
0
1
0
1
0
1
×
×
TGRD_3
Function
Output
compare
register *
Input
capture
register *
2
2
TIOCD3 Pin Function
Output disabled
Initial output is 0 output
0 output at compare match
Initial output is 0 output
1 output at compare match
Initial output is 0 output
Toggle output at compare match
Output disabled
Initial output is 1 output
0 output at compare match
Initial output is 1 output
1 output at compare match
Initial output is 1 output
Toggle output at compare match
Capture input source is TIOCD3 pin
Input capture at rising edge
Capture input source is TIOCD3 pin
Input capture at falling edge
Capture input source is TIOCD3 pin
Input capture at both edges
Capture input source is channel 4/count clock
Input capture at TCNT_4 count-up/count-down *
Rev.7.00 Mar. 18, 2009 page 565 of 1136
Section 11 16-Bit Timer Pulse Unit (TPU)
Description
REJ09B0109-0700
1

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