UPD78F9234MC-5A4-A Renesas Electronics America, UPD78F9234MC-5A4-A Datasheet - Page 128

• Manufacturer Part Number: UPD78F9234MC-5A4-A
• Description: MCU 8BIT 8KB FLASH 30PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9234MC-5A4-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

126
(16) Compare operation
(17) Changing compare register during timer operation
The capture operation may not be performed for CR0n0 set in compare mode even if a capture trigger is input.
Remark n = 0, 1
<1> With the 16-bit timer capture/compare register 0n0 (CR0n0) used as a compare register, when changing
<2> If CR010 is changed during timer counting without performing processing <1> above, the value in
CR0n0 around the timing of a match between 16-bit timer counter 00 (TM00) and 16-bit timer
capture/compare register 0n0 (CR0n0) during timer counting, the change timing may conflict with the
timing of the match, so the operation is not guaranteed in such cases. To change CR0n0 during timer
counting, follow the procedure below using an INTTM000 interrupt.
<Changing cycle (CR000)>
1. Disable the timer output inversion operation at the match between TM00 and CR000 (TOC001 = 0).
2. Disable the INTTM000 interrupt (TMMK000 = 1).
3. Rewrite CR000.
4. Wait for 1 cycle of the TM00 count clock.
5. Enable the timer output inversion operation at the match between TM00 and CR000 (TOC001 = 1).
6. Clear the interrupt request flag of INTTM000 (TMIF000 = 0).
7. Enable the INTTM000 interrupt (TMMK000 = 0).
<Changing duty (CR010)>
1. Disable the timer output inversion operation at the match between TM00 and CR010 (TOC004 = 0).
2. Disable the INTTM000 interrupt (TMMK000 = 1).
3. Rewrite CR010.
4. Wait for 1 cycle of the TM00 count clock.
5. Enable the timer output inversion operation at the match between TM00 and CR010 (TOC004 = 1).
6. Clear the interrupt request flag of INTTM000 (TMIF000 = 0).
7. Enable the INTTM000 interrupt (TMMK000 = 0).
While interrupts and timer output inversion are disabled (1 to 4 above), timer counting is continued. If
the value to be set in CR0n0 is small, the value of TM00 may exceed CR0n0. Therefore, set the value,
considering the time lapse of the timer clock and CPU clock after an INTTM000 interrupt has been
generated.
Remark n = 0, 1
CR010 may be rewritten twice or more, causing an inversion of the output level of the TO00 pin at each
rewrite.
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
User’s Manual U17446EJ5V0UD