UPD78F9234MC-5A4-A Renesas Electronics America, UPD78F9234MC-5A4-A Datasheet - Page 408
UPD78F9234MC-5A4-A
Manufacturer Part Number
UPD78F9234MC-5A4-A
Description
MCU 8BIT 8KB FLASH 30PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet
1.UPD78F9232MC-5A4-A.pdf
(419 pages)
Specifications of UPD78F9234MC-5A4-A
Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F9234MC-5A4-A
Manufacturer:
MAXIM
Quantity:
1 001
Part Number:
UPD78F9234MC-5A4-A
Manufacturer:
NEC
Quantity:
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406
Option byte
Flash
memory
Function
Use of RESET
pin as an input-
only port pin
(P34)
PG-FP5 GUI
Software setting
value example
Security settings
Self
programming
function
Details of
Function
The above values are recommended values. Depending on the usage
environment these values may change, so set them after having performed
sufficient evaluations.
After the security setting of the batch erase is set, erasure cannot be
performed for the device. In addition, even if a write command is executed,
data different from that which has already been written to the flash memory
cannot be written because the erase command is disabled.
Self programming processing must be included in the program before
performing self programming.
No instructions can be executed while a self programming command is being
executed. Therefore, clear and restart the watchdog timer counter in advance
so that the watchdog timer does not overflow during self programming. Refer
to Table 19-10 for the time taken for the execution of self programming.
Interrupts that occur during self programming can be acknowledged after self
programming mode ends. To avoid this operation, disable interrupt servicing
(by setting MK0 and MK1 to FFH, and executing the DI instruction) before a
mode is shifted from the normal mode to the self programming mode with a
specific sequence.
RAM is not used while a self programming command is being executed.
If the supply voltage drops or the reset signal is input while the flash memory
is being written or erased, writing/erasing is not guaranteed.
The value of the blank data set during block erasure is FFH.
Set the CPU clock beforehand so that it is 1 MHz or higher during self
programming.
Execute self programming after executing the NOP and HALT instructions
immediately after executing a specific sequence to set self programming
mode. At this time, the HALT instruction is automatically released after 10
(MAX.) + 2 CPU clocks (f
If the clock of the oscillator or an external clock is selected as the system
clock, execute the NOP and HALT instructions immediately after executing a
specific sequence to set self programming mode, wait for 8
the HALT status, and then execute self programming.
Check FPRERR using a 1-bit memory manipulation instruction.
The state of the pins in self programming mode is the same as that in HALT
mode.
Be aware of the following when re-erasing/-writing (by on-board programming
using a dedicated flash memory programmer) an already-written device which
has been set as “The RESET pin is used as an input-only port pin (P34)” by
the option byte function.
Before supplying power to the target system, connect a dedicated flash
memory programmer and turn its power on. If the power is supplied to the
target system beforehand, the flash memory programming mode cannot be
switched to.
APPENDIX D LIST OF CAUTIONS
User’s Manual U17446EJ5V0UD
CPU
).
Cautions
μ
s after releasing
μ
s
p.271
p.278
p.281
p.282
p.285
p.285
p.285
p.285
p.285
p.285
p.285
p.285
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