UPD78F9234MC-5A4-A Renesas Electronics America, UPD78F9234MC-5A4-A Datasheet - Page 407

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UPD78F9234MC-5A4-A

Manufacturer Part Number
UPD78F9234MC-5A4-A
Description
MCU 8BIT 8KB FLASH 30PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9234MC-5A4-A

Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Manufacturer
Quantity
Price
Part Number:
UPD78F9234MC-5A4-A
Manufacturer:
MAXIM
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UPD78F9234MC-5A4-A
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Low-
voltage
detector
Option byte
Function
When used as
reset
Cautions for low-
voltage detector
Oscillation
stabilization time
on power
application or
after reset
release
Control of
RESET pin
Selection of
system clock
source
Low-speed
internal oscillates
Details of
Function
<1> must always be executed. When LVIMK = 0, an interrupt may occur
immediately after the processing in <3>.
If supply voltage (V
internal reset signal is not generated.
In a system where the supply voltage (V
the vicinity of the LVI detection voltage (V
depending on how the low-voltage detector is used.
<1> When used as reset
The system may be repeatedly reset and released from the reset status.
In this case, the time from release of reset to the start of the operation of the
microcontroller can be arbitrarily set by taking action (1) below.
<2> When used as interrupt
Interrupt requests may be frequently generated. Take action (2) below.
The setting of this option is valid only when the crystal/ceramic oscillation clock
is selected as the system clock source. No wait time elapses if the high-speed
internal oscillation clock or external clock input is selected as the system clock
source.
Because the option byte is referenced after reset release, if a low level is input
to the RESET pin before the option byte is referenced, then the reset state is
not released.
Also, when setting 0 to RMCE, connect the pull-up resistor.
Because the X1 and X2 pins are also used as the P121 and P122 pins, the
conditions under which the X1 and X2 pins can be used differ depending on
the selected system clock source.
(1) Crystal/ceramic oscillation clock is selected
(2) External clock input is selected
(3) High-speed internal oscillation clock is selected
If it is selected that low-speed internal oscillator cannot be stopped, the count
clock to the watchdog timer (WDT) is fixed to low-speed internal oscillation
clock.
If it is selected that low-speed internal oscillator can be stopped by software,
supply of the count clock to WDT is stopped in the HALT/STOP mode,
regardless of the setting of bit 0 (LSRSTOP) of the low-speed internal
oscillation mode register (LSRCM). Similarly, clock supply is also stopped
when a clock other than the low-speed internal oscillation clock is selected as
a count clock to WDT.
While the low-speed internal oscillator is operating (LSRSTOP = 0), the clock
can be supplied to the 8-bit timer H1 even in the STOP mode.
The X1 and X2 pins cannot be used as I/O port pins because they are used
as clock input pins.
Because the X1 pin is used as an external clock input pin, P121 cannot be
used as an I/O port pin.
P121 and P122 can be used as I/O port pins.
APPENDIX D LIST OF CAUTIONS
User’s Manual U17446EJ5V0UD
DD
) ≥ detection voltage (V
Cautions
DD
LVI
) fluctuates for a certain period in
), the operation is as follows
LVI
) when LVIM is set to 1, an
p.263
p.263
p.266
p.270
p.270
p.270
p.271
p.271
(16/20)
Page
405

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