UPD78F9234MC-5A4-A Renesas Electronics America, UPD78F9234MC-5A4-A Datasheet - Page 392
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UPD78F9234MC-5A4-A
Manufacturer Part Number
UPD78F9234MC-5A4-A
Description
MCU 8BIT 8KB FLASH 30PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet
1.UPD78F9232MC-5A4-A.pdf
(419 pages)
Specifications of UPD78F9234MC-5A4-A
Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
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Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F9234MC-5A4-A
Manufacturer:
MAXIM
Quantity:
1 001
Part Number:
UPD78F9234MC-5A4-A
Manufacturer:
NEC
Quantity:
20 000
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This appendix lists cautions described in this document.
“Classification (hard/soft)” in table is as follows.
Hard:
Soft:
Pin
configu-
ration
Pin
functions
Memory
space
Port
functions
Function
Cautions for microcontroller internal/external hardware
Cautions for software such as register settings or programs
AV
P121/X1 and
P122/X2 pins
Vector table
address
SP: Stack pointer
P121/X1 and
P122/X2 pins
P34 pin
P30, P31, and
P43 pins
PMC: Port mode
control register 2
SS
Details of
Function
pin
−
APPENDIX D LIST OF CAUTIONS
Connect the AV
The P121/X1 and P122/X2 pins are pulled down during reset.
No interrupt sources correspond to the vector table address 0014H.
Since generation of reset signal makes the SP contents undefined, be sure to
initialize the SP before using the stack memory.
Stack pointers can be set only to the high-speed RAM area, and only the lower
10 bits can be actually set. Thus, if the stack pointer is specified to 0FF00H, it
is converted to 0FB00H in the high-speed RAM area, since 0FF00H is in the
SFR area and not in the high-speed RAM area.
When the value is actually pushed onto the stack, 1 is subtracted from
0FB00H to become 0FAFFH, but since that value is not in the high-speed
RAM area, it is converted to 0FEFFH, which is the same value as when
0FF00H is set to the stack pointer.
The P121/X1 and P122/X2 pins are pulled down during reset.
Because the P34 pin functions alternately as the RESET pin, if it is used as an
input port pin, the function to input an external reset signal to the RESET pin
cannot be used. The function of the port is selected by the option byte. For
details, refer to CHAPTER 18 OPTION BYTE.
Also, since the option byte is referenced after the reset release, if low level is
input to the RESET pin before the referencing, then the reset state is not
released. When it is used as an input port pin, connect the pull-up resistor.
Because P30, P31, and P43 are also used as external interrupt pins, the
corresponding interrupt request flag is set if each of these pins is set to the
output mode and its output level is changed. To use the port pin in the output
mode, therefore, set the corresponding interrupt mask flag to 1 in advance.
When PMC20 to PMC23 are set to 1, the P20/ANI0 to P23/ANI3 pins cannot
be used as port pins. Moreover, be sure to set the pull-up resistor option
registers (PU20 to PU23) to 0 for the pins set to A/D converter mode.
Although a 1-bit memory manipulation instruction manipulates 1 bit, it
accesses a port in 8-bit units. Therefore, the contents of the output latch of a
pin in the input mode, even if it is not subject to manipulation by the
instruction, are undefined in a port with a mixture of inputs and outputs.
User’s Manual U17446EJ5V0UD
SS
pin to V
SS
.
Cautions
p.16
pp.
21, 22,
24, 25
p.30
p.34
p.34
p.53
p.59
p.67
p.69
p.71
Page
(1/20)
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