UPD78F9234MC-5A4-A Renesas Electronics America, UPD78F9234MC-5A4-A Datasheet - Page 78
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UPD78F9234MC-5A4-A
Manufacturer Part Number
UPD78F9234MC-5A4-A
Description
MCU 8BIT 8KB FLASH 30PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet
1.UPD78F9232MC-5A4-A.pdf
(419 pages)
Specifications of UPD78F9234MC-5A4-A
Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F9234MC-5A4-A
Manufacturer:
MAXIM
Quantity:
1 001
Part Number:
UPD78F9234MC-5A4-A
Manufacturer:
NEC
Quantity:
20 000
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CPU clock (f
(2) Low-speed internal oscillation mode register (LSRCM)
76
The fastest instruction of the 78K0S/KB1+ is executed in two CPU clocks. Therefore, the relationship between the
Note The CPU clock (high-speed internal oscillation clock, crystal/ceramic oscillation clock, or external clock
Address: FF58H After reset: 00H R/W
Symbol
LSRCM
This register is used to select the operation mode of the low-speed internal oscillator (240 kHz (TYP.)).
This register is valid when it is specified by the option byte that the low-speed internal oscillator can be stopped
by software. If it is specified by the option byte that the low-speed internal oscillator cannot be stopped by
software, setting of this register is invalid, and the low-speed internal oscillator continues oscillating. In addition,
the source clock of WDT is fixed to the low-speed internal oscillator.
WATCHDOG TIMER.
LSRCM can be set by using a 1-bit or 8-bit memory manipulation instruction.
Generation of reset signal sets LSRCM to 00H.
f
f
f
f
f
X
X
X
X
X
/2
/2
/2
/2
2
3
4
input) is selected by the option byte.
CPU Clock (f
CPU
Table 5-2. Relationship Between CPU Clock and Minimum Instruction Execution Time
) and the minimum instruction execution time is as shown in Table 5-2.
LSRSTOP
Figure 5-4. Format of Low-Speed Internal Oscillation Mode Register (LSRCM)
7
0
0
1
CPU
)
Note
Low-speed internal oscillates
Low-speed internal oscillator stops
6
0
0.25 s
0.5 s
1.0 s
2.0 s
4.0 s
High-speed internal oscillation clock
CHAPTER 5 CLOCK GENERATORS
(at 8.0 MHz (TYP.))
5
0
User’s Manual U17446EJ5V0UD
Oscillation/stop of low-speed internal oscillator
Minimum Instruction Execution Time: 2/f
4
0
3
0
0.2 s
0.4 s
0.8 s
1.6 s
3.2 s
or external clock input (at 10.0 MHz)
Crystal/ceramic oscillation clock
2
0
For details, refer to CHAPTER 9
CPU
1
0
LSRSTOP
<0>
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