SAF-TC1130-L150EB-G BB Infineon Technologies, SAF-TC1130-L150EB-G BB Datasheet - Page 58

• Manufacturer Part Number: SAF-TC1130-L150EB-G BB
• Description: IC MCU 32BIT TRICOR 16KB LBGA208
• Manufacturer: Infineon Technologies
• Series: TC11xxr

Specifications of SAF-TC1130-L150EB-G BB

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Type: ROMless
• Ram Size: 144K x 8
• Voltage - Supply (vcc/vdd): 1.43 V ~ 1.58 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LSBGA
• Data Bus Width: 32 bit
• Program Memory Size: 32 KB
• Data Ram Size: 144 KB
• Interface Type: 3xASC, 2xSSC, I2C, 2xMLI, Ethernet 10, 100 Mbits, s, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 72
• Number Of Timers: 9
• Operating Supply Voltage: 1.5 V, 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Packages: PG-LBGA-208
• Max Clock Frequency: 150.0 MHz
• Sram (incl. Cache): 144.0 KByte
• Can Nodes: 4
• Program Memory: 0.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: FT1130L150EBGBBXP; SAF-TC1130-L150EB-GBB; SAF-TC1130-L150EB-GBBINTR; SAF-TC1130-L150EB-GBBTR; SAF-TC1130-L150EB-GBBTR; SAFTC1130L150EBBBXT; SP000106119; SP000106538; SP000743584

3.15
Figure 3-11
Unit (GPTU).
Figure 3-11 General Block Diagram of the GPTU Interface
The GPTU consists of three 32-bit timers designed to solve such application tasks as
event timing, event counting, and event recording. The GPTU communicates with the
external world via eight I/O lines located at Port 0.
The three timers of GPTU module, T0, T1 and T2, can operate independently of each
other or can be combined:
General Features:
• All timers are 32-bit precision timers with a maximum input frequency of
• Events generated in T0 or T1 can be used to trigger actions in T2
• Timer overflow or underflow in T2 can be used to clock either T0 or T1
• T0 and T1 can be concatenated to form one 64-bit timer
Features of T0 and T1:
• Each timer has a dedicated 32-bit reload register with automatic reload on overflow
• Timers can be split into individual 8-, 16-, or 24-bit timers with individual reload
Data Sheet
registers
Decoder
Interrupt
Address
Control
Control
Clock
General Purpose Timer Unit (GPTU)
shows a global view of the functional blocks of the General Purpose Timer
f
GPTU0
SR0
SR1
SR2
SR3
SR4
SR5
SR6
SR7
Module
GPTU
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
52
Control
Port 0
Functional Description
P0.7/GPTU_7
P0.2/GPTU_2
P0.4/GPTU_4
P0.6/GPTU_6
P0.0/GPTU_0
P0.1/GPTU_1
P0.3/GPTU_3
P0.5/GPTU_5
V1.1, 2008-12
f
GPTU
TC1130