AT89C51ED2-3CSIM Atmel, AT89C51ED2-3CSIM Datasheet - Page 28
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AT89C51ED2-3CSIM
Manufacturer Part Number
AT89C51ED2-3CSIM
Description
IC 8051 MCU FLASH 64K 40DIP
Manufacturer
Atmel
Series
89Cr
Datasheet
1.ATWEBDVK-02RC.pdf
(137 pages)
Specifications of AT89C51ED2-3CSIM
Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Data Bus Width
8 bit
Data Ram Size
64 KB
Interface Type
SPI, UART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3 x 16 bit
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT89C51ED2-3CSIM
Manufacturer:
ATMEL
Quantity:
77 760
11. Power Monitor
11.1
28
Description
AT89C51RD2/ED2
The POR/PFD function monitors the internal power-supply of the CPU core memories and the
peripherals, and if needed, suspends their activity when the internal power supply falls below a
safety threshold. This is achieved by applying an internal reset to them.
By generating the Reset the Power Monitor insures a correct start up when AT89C51RD2/ED2
is powered up.
In order to startup and maintain the microcontroller in correct operating mode, V
bilized in the V
compatible with logic level VIH/VIL.
These parameters are controlled during the three phases: power-up, normal operation and
power going down. See Figure 11-1.
Figure 11-1. Power Monitor Block Diagram
Note:
The Voltage regulator generates a regulated internal supply for the CPU core the memories and
the peripherals. Spikes on the external Vcc are smoothed by the voltage regulator.
The Power fail detect monitor the supply generated by the voltage regulator and generate a
reset if this supply falls below a safety threshold as illustrated in the Figure 11-2 below.
RST pin
1. Once XTAL1 High and low levels reach above and below VIH/VIL. a 1024 clock period delay
XTAL1
will extend the reset coming from the Power Fail Detect. If the power falls below the Power Fail
Detect threshold level, the Reset will be applied immediately.
CC
PCA
Watchdog
operating range and the oscillator has to be stabilized with a nominal amplitude
Voltage Regulator
Power Fail Detect
Power On Reset
(1)
Hardware
Watchdog
VCC
Regulated
Supply
Internal Reset
Peripherals
CPU core
Memories
CC
4235K–8051–05/08
has to be sta-