AT89C51ED2-3CSIM Atmel, AT89C51ED2-3CSIM Datasheet - Page 99

IC 8051 MCU FLASH 64K 40DIP

AT89C51ED2-3CSIM

Manufacturer Part Number
AT89C51ED2-3CSIM
Description
IC 8051 MCU FLASH 64K 40DIP
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51ED2-3CSIM

Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Data Bus Width
8 bit
Data Ram Size
64 KB
Interface Type
SPI, UART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3 x 16 bit
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C51ED2-3CSIM
Manufacturer:
ATMEL
Quantity:
77 760
Part Number:
AT89C51ED2-3CSIM
Manufacturer:
SSG
Quantity:
100
24.6.3
4235K–8051–05/08
Functional Description
Specific Protocol
External Host with
Communication
Figure 24-3. Bootloader Functional Description
On the above diagram, the on-chip bootloader processes are:
The purpose of this process is to manage the communication and its protocol between the on-
chip bootloader and a external device. The on-chip ROM implements a serial protocol (see sec-
tion “Bootloader Protocol”). This process translate serial communication frame (UART) into
Flash memory access (read, write, erase, etc.).
Several Application Program Interface (API) calls are available for use by an application pro-
gram to permit selective erasing and programming of Flash pages. All calls are made through a
common interface (API calls), included in the ROM bootloader. The programming functions are
selected by setting up the microcontroller’s registers before making a call to a common entry
point (0xFFF0). Results are returned in the registers. The purpose on this process is to translate
the registers values into internal Flash Memory Management.
This process manages low level access to Flash memory (performs read and write access).
• ISP Communication Management
• User Call Management
• Flash Memory Management
ISP Communication
Management
Flash Memory
Management
Memory
Flash
Management (API)
User Call
AT89C51RD2/ED2
Application
User
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