AT91SAM7SE512-AU Atmel, AT91SAM7SE512-AU Datasheet - Page 25

• Manufacturer Part Number: AT91SAM7SE512-AU
• Description: IC ARM7 MCU FLASH 512K 128-LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7SE512-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: EBI/EMI, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 88
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-LQFP
• Cpu Family: 91S
• Device Core: ARM7TDMI
• Device Core Size: 32b
• Frequency (max): 55MHz
• Interface Type: EBI/SPI/TWI/USART
• Total Internal Ram Size: 32KB
• # I/os (max): 88
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.65/3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 128
• Package Type: LQFP
• No. Of I/o's: 88
• Ram Memory Size: 32KB
• Cpu Speed: 48MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 4
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7SE-EK
• Minimum Operating Temperature: - 40 C
• For Use With: AT91SAM7SE-EK - EVAL BOARD FOR AT91SAM7SEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

8.1.2.2
8.1.2.3
8.1.2.4
6222F–ATARM–14-Jan-11
Embedded Flash Controller
Lock Regions
Security Bit Feature
The Flash benefits from the integration of a power reset cell and from the brownout detector.
This prevents code corruption during power supply changes, even in the worst conditions.
The Embedded Flash Controller (EFC) manages accesses performed by the masters of the sys-
tem. It enables reading the Flash and writing the write buffer. It also contains a User Interface,
mapped within the Memory Controller on the APB. The User Interface allows:
The Embedded Flash Controller also provides a dual 32-bit Prefetch Buffer that optimizes 16-bit
access to the Flash. This is particularly efficient when the processor is running in Thumb mode.
The SAM7SE512 Embedded Flash Controller manages 32 lock bits to protect 32 regions of the
flash against inadvertent flash erasing or programming commands. The SAM7SE512 contains
32 lock regions and each lock region contains 64 pages of 256 bytes. Each lock region has a
size of 16 Kbytes.
The SAM7SE256 Embedded Flash Controller manages 16 lock bits to protect 16 regions of the
flash against inadvertent flash erasing or programming commands. The SAM7SE256 contains
16 lock regions and each lock region contains 64 pages of 256 bytes. Each lock region has a
size of 16 Kbytes.
The SAM7SE32 Embedded Flash Controller manages 8 lock bits to protect 8 regions of the
flash against inadvertent flash erasing or programming commands. The SAM7SE32 contains 8
lock regions and each lock region contains 32 pages of 128 bytes. Each lock region has a size of
4 Kbytes.
If a locked-region’s erase or program command occurs, the command is aborted and the EFC
trigs an interrupt.
The 32 (SAM7SE512), 16 (SAM7SE256) or 8 (SAM7SE32) NVM bits are software programma-
ble through the EFC User Interface. The command “Set Lock Bit” enables the protection. The
command “Clear Lock Bit” unlocks the lock region.
Asserting the ERASE pin clears the lock bits, thus unlocking the entire Flash.
The SAM7SE512/256/32 features a security bit, based on a specific NVM-bit. When the security
is enabled, any access to the Flash, either through the ICE interface or through the Fast Flash
Programming Interface, is forbidden.
• programming of the access parameters of the Flash (number of wait states, timings, etc.)
• starting commands such as full erase, page erase, page program, NVM bit set, NVM bit
• getting the end status of the last command
• getting error status
• programming interrupts on the end of the last commands or on errors
• Two EFCs (EFC0 and EFC1) are embedded in the SAM7SE512 to control each plane of 256
• One EFC (EFC0) is embedded in the SAM7SE256 to control the single plane 256 KBytes.
• One EFC (EFC0) is embedded in the SAM7SE32 to control the single plane 32 KBytes.
clear, etc.
KBytes. Dual plane organization allows concurrent Read and Program.
SAM7SE512/256/32 Preliminary
25