AT91SAM7SE512-AU Atmel, AT91SAM7SE512-AU Datasheet - Page 611

IC ARM7 MCU FLASH 512K 128-LQFP

AT91SAM7SE512-AU

Manufacturer Part Number
AT91SAM7SE512-AU
Description
IC ARM7 MCU FLASH 512K 128-LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7SE512-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
EBI/EMI, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
88
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-LQFP
Cpu Family
91S
Device Core
ARM7TDMI
Device Core Size
32b
Frequency (max)
55MHz
Interface Type
EBI/SPI/TWI/USART
Total Internal Ram Size
32KB
# I/os (max)
88
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
128
Package Type
LQFP
No. Of I/o's
88
Ram Memory Size
32KB
Cpu Speed
48MHz
No. Of Timers
3
No. Of Pwm Channels
4
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
32 KB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7SE-EK
Minimum Operating Temperature
- 40 C
For Use With
AT91SAM7SE-EK - EVAL BOARD FOR AT91SAM7SEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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39.6.7
Name:
Access:
• LDATA: Last Data Converted
The analog-to-digital conversion data is placed into this register at the end of a conversion and remains until a new conver-
sion is completed.
39.6.8
Name:
Access:
• EOCx: End of Conversion Interrupt Enable x
• OVREx: Overrun Error Interrupt Enable x
• DRDY: Data Ready Interrupt Enable
• GOVRE: General Overrun Error Interrupt Enable
• ENDRX: End of Receive Buffer Interrupt Enable
• RXBUFF: Receive Buffer Full Interrupt Enable
0 = No effect.
1 = Enables the corresponding interrupt.
6222F–ATARM–14-Jan-11
OVRE7
EOC7
31
23
15
31
23
15
7
7
ADC Last Converted Data Register
ADC Interrupt Enable Register
OVRE6
EOC6
30
22
14
30
22
14
ADC_LCDR
Read-only
6
ADC_IER
Write-only
6
OVRE5
EOC5
29
21
13
29
21
13
5
5
OVRE4
EOC4
28
20
12
28
20
12
4
4
LDATA
SAM7SE512/256/32 Preliminary
RXBUFF
OVRE3
EOC3
27
19
11
27
19
11
3
3
ENDRX
OVRE2
EOC2
26
18
10
26
18
10
2
2
GOVRE
OVRE1
EOC1
25
17
25
17
9
1
9
1
LDATA
OVRE0
DRDY
EOC0
24
16
24
16
8
0
8
0
611

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