AT91SAM7SE512-AU Atmel, AT91SAM7SE512-AU Datasheet - Page 573

IC ARM7 MCU FLASH 512K 128-LQFP

AT91SAM7SE512-AU

Manufacturer Part Number
AT91SAM7SE512-AU
Description
IC ARM7 MCU FLASH 512K 128-LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7SE512-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
EBI/EMI, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
88
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-LQFP
Cpu Family
91S
Device Core
ARM7TDMI
Device Core Size
32b
Frequency (max)
55MHz
Interface Type
EBI/SPI/TWI/USART
Total Internal Ram Size
32KB
# I/os (max)
88
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
128
Package Type
LQFP
No. Of I/o's
88
Ram Memory Size
32KB
Cpu Speed
48MHz
No. Of Timers
3
No. Of Pwm Channels
4
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
32 KB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7SE-EK
Minimum Operating Temperature
- 40 C
For Use With
AT91SAM7SE-EK - EVAL BOARD FOR AT91SAM7SEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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38.6
WARNING: The UDP peripheral clock in the Power Management Controller (PMC) must be enabled before any read/write
operations to the UDP registers, including the UDP_TXVC register.
Table 38-5.
Notes:
6222F–ATARM–14-Jan-11
Offset
0x000
0x004
0x008
0x00C
0x010
0x014
0x018
0x01C
0x020
0x024
0x028
0x02C
0x030 + 0x4 * (ept_num - 1)
0x050 + 0x4 * (ept_num - 1)
0x070
0x074
0x078 - 0xFC
USB Device Port (UDP) User Interface
1. Reset values are not defined for UDP_ISR.
2. See Warning above the
Register Mapping
Register
Frame Number Register
Global State Register
Function Address Register
Reserved
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Interrupt Status Register
Interrupt Clear Register
Reserved
Reset Endpoint Register
Reserved
Endpoint Control and Status Register
Endpoint FIFO Data Register
Reserved
Transceiver Control Register
Reserved
”Register Mapping”
on this page.
SAM7SE512/256/32 Preliminary
Name
UDP_FRM_NUM
UDP_GLB_STAT
UDP_FADDR
UDP_IER
UDP_IDR
UDP_IMR
UDP_ISR
UDP_ICR
UDP_RST_EP
UDP_CSR
UDP_FDR
UDP_TXVC
(2)
Access
Read-only
Read-write
Read-write
Write-only
Write-only
Read-only
Read-only
Write-only
Read-write
Read-write
Read-write
Read-write
0x0000_0000
0x0000_0100
0x0000_1200
0x0000_0000
Reset
0x0000_0010
0x0000_0000
0x0000_0000
0x0000_0100
(1)
573

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