MC68HC908KX2CP Freescale Semiconductor, MC68HC908KX2CP Datasheet - Page 102

• Manufacturer Part Number: MC68HC908KX2CP
• Description: IC MCU 2K FLASH 8MHZ SCI 16-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908KX2CP

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Low-Voltage Inhibit (LVI)
Setting the LVI 5-V or 3-V trip point bit, LVI5OR3, enables the trip point voltage, V
for 5-V operation. Clearing the LVI5OR3 bit enables the trip point voltage, V
operation. The actual trip thresholds are specified in
Once an LVI reset occurs, the MCU remains in reset until V
causes the MCU to exit reset. See
sequence.
The output of the comparator controls the state of the LVIOUT flag in the LVI status register (LVISR) and
can be used for polling LVI operation when the LVI reset is disabled.
10.3.1 Polled LVI Operation
In applications that can operate at V
the LVIOUT bit. In the configuration register, the LVIPWRD bit must be at 0 to enable the LVI module, and
the LVIRSTD bit must be at 1 to disable LVI resets.
10.3.2 Forced Reset Operation
In applications that require V
module to reset the MCU when V
LVIPWRD and LVIRSTD bits must be at 0 to enable the LVI module and to enable LVI resets.
10.3.3 Voltage Hysteresis Protection
Once the LVI has triggered (by having V
V
continually entering and exiting reset if V
V
10.3.4 LVI Trip Selection
The LVI5OR3 bit in the configuration register selects whether the LVI is configured for 5-V or 3-V
protection.
102
DD
TRIPF
rises above the rising trip point voltage, V
by the hysteresis voltage, V
After a power-on reset, the LVI’s default mode of operation is 3 volts. If a
5-V system is used, the user must set the LVI5OR3 bit to raise the trip point
to 5-V operation.
If the user requires 5-V mode and sets the LVI5OR3 bit after power-on reset
while the V
immediately go into reset. The next time the LVI releases the reset, the
supply will be above the V
The microcontroller is guaranteed to operate at a minimum supply voltage.
The trip point (V
5.0-Vdc DC Electrical Characteristics
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
DD
DD
supply is not above the V
TRIPF
to remain above the V
DD
Chapter 13 System Integration Module (SIM)
HYS
DD
[5 V] or V
falls below the V
levels below the V
.
DD
DD
TRIPR
fall below V
is approximately equal to V
TRIPF
TRIPR
for 5-V mode.
NOTE
NOTE
[3 V]) may be lower than this. See
. This prevents a condition in which the MCU is
and for the actual trip point voltages.
17.5 5.0-Vdc DC Electrical Characteristics
TRIPF
TRIPF
TRIPR
TRIPF
TRIPF
level. In the configuration register, the
DD
), the LVI will maintain a reset condition until
level, enabling LVI resets allows the LVI
for 5-V mode, the MCU will
level, software can monitor V
rises above a voltage, V
TRIPF
TRIPF
. V
TRIPR
, to be configured for 3-V
for the reset recovery
TRIPF
Freescale Semiconductor
17.5
is greater than
, to be configured
TRIPR
DD
, which
by polling
and .