MC68HC908KX2CP Freescale Semiconductor, MC68HC908KX2CP Datasheet - Page 147

• Manufacturer Part Number: MC68HC908KX2CP
• Description: IC MCU 2K FLASH 8MHZ SCI 16-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908KX2CP

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

13.6.2 Stop Mode
In stop mode, the SIM counter is held in reset and the CPU and peripheral clocks are held inactive. If the
OSCENINSTOP bit in the configuration register is not enabled, the SIM also disables the internal clock
generator module outputs (CGMOUT and CGMXCLK).
The CPU and peripheral clocks do not become active until after the stop delay timeout. Stop mode is
exited via an interrupt request from a module that is still active in stop mode or from a system reset.
An interrupt request from a module that is still active in stop mode can cause an exit from stop mode. Stop
recovery time is selectable using the SSREC bit in the configuration register. If SSREC is set, stop
recovery is reduced from the normal delay of 4096 CGMXCLK cycles down to 32. Stacking for interrupts
begins after the selected stop recovery time has elapsed.
When stop mode is exited due to a reset condition, the SIM forces a long stop recovery time of 4096
CGMXCLK cycles.
The SIM counter is held in reset from the execution of the STOP instruction until the beginning of stop
recovery. It is then used to time the recovery period.
Freescale Semiconductor
CGMXCLK
INT
IAB
Short stop recovery is ideal for applications using canned oscillators that do
not require long startup times for stop mode. External crystal applications
should use the full stop recovery time by clearing the SSREC bit.
CPUSTOP
Note: Previous data can be operand data or the STOP opcode, depending on the last instruction.
R/W
IAB
IDB
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
Figure 13-15. Stop Mode Recovery from Interrupt
STOP ADDR
STOP +1
Figure 13-14. Stop Mode Entry Timing
PREVIOUS DATA
STOP ADDR + 1
STOP + 2
STOP RECOVERY PERIOD
NOTE
NEXT OPCODE
Figure 13-14
STOP + 2
SAME
SP
shows stop mode entry timing.
SAME
SP – 1
SAME
SAME
SP – 2
Low-Power Modes
SP – 3
147