MC68HC908KX2CP Freescale Semiconductor, MC68HC908KX2CP Datasheet - Page 122

• Manufacturer Part Number: MC68HC908KX2CP
• Description: IC MCU 2K FLASH 8MHZ SCI 16-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908KX2CP

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Serial Communications Interface Module (SCI)
Fast Data Tolerance
122
With the misaligned character shown in
when the count of the transmitting device is 9 bit times × 16 RT cycles + 3 RT cycles = 147 RT cycles.
The maximum percent difference between the receiver count and the transmitter count of a slow 8-bit
character with no errors is
For a 9-bit character, data sampling of the stop bit takes the receiver
10 bit times × 16 RT cycles + 10 RT cycles = 170 RT cycles.
With the misaligned character shown in
when the count of the transmitting device is
10 bit times × 16 RT cycles + 3 RT cycles = 163 RT cycles.
The maximum percent difference between the receiver count and the transmitter count of a slow 9-bit
character with no errors is
Figure 12-9
error or a framing error. The fast stop bit ends at RT10 instead of RT16 but is still there for the stop bit
data samples at RT8, RT9, and RT10.
For an 8-bit character, data sampling of the stop bit takes the receiver
9 bit times × 16 RT cycles + 10 RT cycles = 154 RT cycles.
With the misaligned character shown in
when the count of the transmitting device is 10 bit times × 16 RT cycles = 160 RT cycles.
The maximum percent difference between the receiver count and the transmitter count of a fast 8-bit
character with no errors is
For a 9-bit character, data sampling of the stop bit takes the receiver
10 bit times × 16 RT cycles + 10 RT cycles = 170 RT cycles.
With the misaligned character shown in
when the count of the transmitting device is 11 bit times × 16 RT cycles = 176 RT cycles.
shows how much a fast received character can be misaligned without causing a noise
RECEIVER
RT CLOCK
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
154 160
------------------------- -
154 147
------------------------- -
170 163
------------------------- -
Figure 12-9. Fast Data
154
154
170
STOP
–
Figure
Figure
Figure
Figure
–
–
×
×
×
12-8, the receiver counts 154 RT cycles at the point
12-8, the receiver counts 170 RT cycles at the point
12-9, the receiver counts 154 RT cycles at the point
12-9, the receiver counts 170 RT cycles at the point
100
100
100
SAMPLES
DATA
=
=
=
3.90%.
4.54%
4.12%
IDLE OR NEXT CHARACTER
Freescale Semiconductor