MC68HC908KX2CP Freescale Semiconductor, MC68HC908KX2CP Datasheet - Page 137

• Manufacturer Part Number: MC68HC908KX2CP
• Description: IC MCU 2K FLASH 8MHZ SCI 16-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908KX2CP

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Chapter 13
System Integration Module (SIM)
13.1 Introduction
This section describes the system integration module (SIM), which supports up to 24 external and/or
internal interrupts. The SIM is a system state controller that coordinates the central processor unit (CPU)
and exception timing. Together with the CPU, the SIM controls all microcontroller unit (MCU) activities.
Figure 13-1
Figure
The SIM is responsible for:
Freescale Semiconductor
$FE01
$FE04
$FE05
$FE06
Addr.
•
•
•
•
•
Bus clock generation and control for CPU and peripherals:
–
–
Master reset control, including power-on reset (POR) and computer operating properly (COP)
timeout
Interrupt control:
–
–
–
CPU enable/disable timing
Modular architecture expandable to 128 interrupt sources
13-2.
SIM Reset Status Register
Interrupt Status Register 1
Interrupt Status Register 2
Interrupt Status Register 3
Stop/wait/reset entry and recovery
Internal clock control
Acknowledge timing
Arbitration control timing
Vector address generation
Register Name
is a summary of the SIM input/output (I/O) registers. A block diagram of the SIM is shown in
See page 148.
See page 149.
See page 150.
See page 150.
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
(SRSR)
(INT1)
(INT2)
(INT3)
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
POR:
Figure 13-1. SIM I/O Register Summary
Bit 7
POR
IF14
IF22
IF6
R
R
R
1
0
0
0
= Unimplemented
IF13
IF21
IF5
R
R
R
6
0
0
0
0
0
COP
IF12
IF20
IF4
R
R
R
5
0
0
0
0
ILOP
IF11
IF19
IF3
R
R
R
R
4
0
0
0
0
= Reserved
ILAD
IF10
IF18
IF2
R
R
R
3
0
0
0
0
MENRST
IF17
IF1
IF9
R
R
R
2
0
0
0
0
IF16
LVI
IF8
R
R
R
1
0
0
0
0
0
Bit 0
IF15
IF7
R
R
R
0
0
0
0
0
0
137