MC68HC908KX2CP Freescale Semiconductor, MC68HC908KX2CP Datasheet - Page 171

• Manufacturer Part Number: MC68HC908KX2CP
• Description: IC MCU 2K FLASH 8MHZ SCI 16-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908KX2CP

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

16.2.1.3 TIM1 and TIM2 During Break Interrupts
A break interrupt stops the timer counters.
16.2.1.4 COP During Break Interrupts
The COP is disabled during a break interrupt when BDCOP bit is set in break auxiliary register (BRKAR).
16.2.2 Break Module Registers
These registers control and monitor operation of the break module:
16.2.2.1 Break Status and Control Register
The break status and control register (BRKSCR) contains break module enable and status bits.
BRKE — Break Enable Bit
BRKA — Break Active Bit
Freescale Semiconductor
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This read/write bit enables breaks on break address register matches. Clear BRKE by writing a 0 to
bit 7. Reset clears the BRKE bit.
This read/write status and control bit is set when a break address match occurs. Writing a 1 to BRKA
generates a break interrupt. Clear BRKA by writing a 0 to it before exiting the break routine. Reset
clears the BRKA bit.
1 = Breaks enabled on 16-bit address match
0 = Breaks disabled on 16-bit address match
1 = When read, break address match
0 = When read, no break address match
Break status and control register (BRKSCR)
Break address register high (BRKH)
Break address register low (BRKL)
SIM break status register (SBSR)
SIM break flag control register (SBFCR)
Address:
Reset:
Read:
Write:
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
Figure 16-3. Break Status and Control Register (BRKSCR)
$FE0B
BRKE
Bit 7
0
= Unimplemented
BRKA
6
0
5
0
0
4
0
0
3
0
0
2
0
0
1
0
0
Break Module (BRK)
Bit 0
0
0
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