MC68HC908KX2CP Freescale Semiconductor, MC68HC908KX2CP Datasheet - Page 173

• Manufacturer Part Number: MC68HC908KX2CP
• Description: IC MCU 2K FLASH 8MHZ SCI 16-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908KX2CP

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

16.2.2.4 Break Flag Control Register
The break flag control register (SBFCR) contains a bit that enables software to clear status bits while the
MCU is in a break state.
BCFE — Break Clear Flag Enable Bit
16.2.2.5 Break Auxiliary Register
The break auxiliary register (BRKAR) contains a bit that enables software to disable the COP while the
MCU is in a state of break interrupt with monitor mode.
BDCOP — Break Disable COP Bit
16.2.3 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power-consumption standby modes.
16.2.3.1 Wait Mode
If enabled, the break module is active in wait mode. In the break routine, the user can subtract one from
the return address on the stack if SBSW is set. Clear the BW bit by writing 0 to it.
16.2.3.2 Stop Mode
A break interrupt causes exit from stop mode and sets the BW bit in the break status register.
Freescale Semiconductor
This read/write bit enables software to clear status bits by accessing status registers while the MCU is
in a break state. To clear status bits during the break state, the BCFE bit must be set.
This read/write bit disables the COP during a break interrupt. Reset clears the BDCOP bit.
1 = Status bits clearable during break
0 = Status bits not clearable during break
1 = COP disabled during break interrupt
0 = COP enabled during break interrupt
Address:
Address:
Reset:
Reset:
Read:
Read:
Write:
Write:
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
$FE03
Figure 16-7. SIM Break Flag Control Register (SBFCR)
$FE02
BCFE
Bit 7
Bit 7
R
0
0
0
Figure 16-8. Break Auxiliary Register (BRKAR)
= Reserved
= Unimplemented
R
6
6
0
0
R
5
5
0
0
R
4
4
0
0
R
3
3
0
0
R
2
2
0
0
R
1
1
0
0
BDCOP
Break Module (BRK)
Bit 0
Bit 0
R
0
173