MC68HC908KX2CP Freescale Semiconductor, MC68HC908KX2CP Datasheet - Page 41

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MC68HC908KX2CP

Manufacturer Part Number
MC68HC908KX2CP
Description
IC MCU 2K FLASH 8MHZ SCI 16-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908KX2CP

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
3.3.2 Voltage Conversion
When the input voltage to the ADC equals V
Generator), the ADC converts the signal to $FF (full scale). If the input voltage equals V
converts it to $00. Input voltages between V
input voltages will result in $FF if greater than V
3.3.3 Conversion Time
Conversion starts after a write to the ADSCR (ADC status control register, $003C) and requires between
16 and 17 ADC clock cycles to complete. Conversion time in terms of the number of bus cycles is a
function of CGMXCLK frequency, bus frequency, the ADIV prescaler bits, and the ADICLK bit. For
example, with a CGMXCLK frequency of 8 MHz, bus frequency of 2 MHz, and fixed ADC clock frequency
of 1 MHz, one conversion will take between 16 and 17 µs and there will be 32 bus cycles between each
conversion. Sample rate is approximately 60 kHz.
Freescale Semiconductor
Input voltage should not exceed the high-voltage reference, which in turn
should not exceed supply voltages.
INTERNAL
DATA BUS
AIEN
INTERRUPT
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
LOGIC
READ DDRB
WRITE
WRITE PTB
READ PTB
READ ADR
COCO
BUS CLOCK
CGMXCLK
CONVERSION
COMPLETE
RESET
Figure 3-2. ADC Block Diagram
ADC DATA REGISTER
ADIV[2:0]
GENERATOR
REFH
REFH
CLOCK
ADC
REFH
DDRBx
PTBx
ADC CLOCK
NOTE
ADICLK
and V
(see
and $00 if less than V
17.9 Trimmed Accuracy of the Internal Clock
SS
are a straight-line linear conversion. All other
ADC VOLTAGE IN
ADCVIN
DISABLE
DISABLE
CHANNEL
SELECT
SS
ADC CHANNEL x
.
PTB
ADCH[4:0]
Functional Description
SS,
the ADC
41

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