MC68HC908KX2CP Freescale Semiconductor, MC68HC908KX2CP Datasheet - Page 176

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MC68HC908KX2CP

Manufacturer Part Number
MC68HC908KX2CP
Description
IC MCU 2K FLASH 8MHZ SCI 16-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908KX2CP

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Development Support
The MCU initially comes out of reset using the external clock for its clock source. This overrides the user
mode operation of the oscillator circuits where the part comes up using the internally generated oscillator.
Running from an external clock allows the MCU, using an appropriate frequency clock source, to
communicate with host software at standard baud rates.
The computer operating properly (COP) module is disabled in normal monitor mode whenever V
applied to the IRQ1 pin. If the voltage on IRQ1 is less than V
COPD configuration bit.
16.3.1.3 Forced Monitor Mode
If the voltage applied to the IRQ1 is less than V
MENRST module is monitoring the reset vector fetches and will assert an internal reset if it detects that
the reset vectors are erased ($FF). When the MCU comes out of reset, it is forced into monitor mode
without requiring high voltage on the IRQ1 pin.
Once out of reset, the monitor code is initially executing off the internal clock at its default frequency. The
monitor code reconfigures the ICG module to use the external square-wave clock source. Switching to an
external clock source allows the MCU, using an appropriate clock frequency, to communicate with host
software at standard baud rates.
The COP module is disabled in forced monitor mode. Any reset other than a power-on reset (POR) will
automatically force the MCU to come back to the forced monitor mode.
16.3.1.4 Monitor Mode Vectors
Monitor mode uses alternate vectors for reset and SWI interrupts. The alternate vectors are in the $FE
page instead of the $FF page and allow code execution from the internal monitor firmware instead of user
code.
176
Table 16-2
Monitor
Modes
User
PTA1 = 0 and PTA0 = 1 allow normal serial communications. PTA1 = 1
allows parallel communications during security code entry. (For parallel
communications, configure PTA0 = 0 or PTA0 = 1.)
While the voltage on IRQ1 is at V
external square-wave clock becomes the clock source. Dropping IRQ1 to
below V
source selected by the ICG (as determined by the settings in the ICG
registers).
In normal monitor mode with V
PTB7/(OSC2)/RST to function as a RST pin. This is useful for testing the
MCU. Dropping IRQ1 voltage to below V
to its user mode function.
shows vector differences between user mode and monitor mode.
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
Reset Vector High
TST
$FEFE
will remove the bypass and the MCU will revert to the clock
$FFFE
Table 16-2. Monitor Mode Vector Relocation
Reset Vector Low
TST
$FEFF
$FFFF
TST
TST
NOTE
NOTE
on IRQ1, the MCU alters
, the MCU will come out of reset in user mode. The
, the ICG module is bypassed and the
TST
will revert PTB7/(OSC2)/RST
SWI Vector High
TST
, the COP module is controlled by the
$FEFC
$FFFC
SWI Vector Low
$FFFD
$FEFD
Freescale Semiconductor
TST
is

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