SAK-C164CM-4EF AB Infineon Technologies, SAK-C164CM-4EF AB Datasheet - Page 35

IC MCU 16BIT 32KB OTP TQFP-64-4

SAK-C164CM-4EF AB

Manufacturer Part Number
SAK-C164CM-4EF AB
Description
IC MCU 16BIT 32KB OTP TQFP-64-4
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAK-C164CM-4EF AB

Core Processor
C166
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
64-LFQFP
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
1xASC, 1xSSC
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
50
Number Of Timers
5
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Packages
P-TQFP-64
Max Clock Frequency
20.0 MHz
Sram (incl. Cache)
2.0 KByte
Can Nodes
1
A / D Input Lines (incl. Fadc)
8
Program Memory
32.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
SAK-C164CM-4EFAB
SAK-C164CM-4EFABINTR
SAK-C164CM-4EFABTR
SAK-C164CM-4EFABTR
SAKC164CM4EFABXT
SP000056829
SP000104063
Instruction Set Summary
Table 6
The various addressing modes that can be used with a specific instruction, the operation
of the instructions, parameters for conditional execution of instructions, and the opcodes
for each instruction can be found in the “C166 Family Instruction Set Manual”.
This document also provides a detailed description of each instruction.
Table 6
Mnemonic
ADD(B)
ADDC(B)
SUB(B)
SUBC(B)
MUL(U)
DIV(U)
DIVL(U)
CPL(B)
NEG(B)
AND(B)
OR(B)
XOR(B)
BCLR
BSET
BMOV(N)
BAND, BOR,
BXOR
BCMP
BFLDH/L
CMP(B)
CMPD1/2
CMPI1/2
PRIOR
SHL / SHR
ROL / ROR
ASHR
Data Sheet
lists the instructions of the C164CM in a condensed way.
Instruction Set Summary
Description
Add word (byte) operands
Add word (byte) operands with Carry
Subtract word (byte) operands
Subtract word (byte) operands with Carry
(Un)Signed multiply direct GPR by direct GPR (16-16-bit)
(Un)Signed divide register MDL by direct GPR (16-/16-bit)
(Un)Signed long divide reg. MD by direct GPR (32-/16-bit)
Complement direct word (byte) GPR
Negate direct word (byte) GPR
Bitwise AND, (word/byte operands)
Bitwise OR, (word/byte operands)
Bitwise XOR, (word/byte operands)
Clear direct bit
Set direct bit
Move (negated) direct bit to direct bit
AND/OR/XOR direct bit with direct bit
Compare direct bit to direct bit
Bitwise modify masked high/low byte of bit-addressable
direct word memory with immediate data
Compare word (byte) operands
Compare word data to GPR and decrement GPR by 1/2
Compare word data to GPR and increment GPR by 1/2
Determine number of shift cycles to normalize direct
word GPR and store result in direct word GPR
Shift left/right direct word GPR
Rotate left/right direct word GPR
Arithmetic (sign bit) shift right direct word GPR
31
V1.0, 2001-05
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