ATMEGA2560R231-CU Atmel, ATMEGA2560R231-CU Datasheet - Page 160

• Manufacturer Part Number: ATMEGA2560R231-CU
• Description: BUNDLE ATMEGA2560/RF231 PBGA
• Manufacturer: Atmel

Specifications of ATMEGA2560R231-CU

• Frequency: 2.4GHz
• Modulation Or Protocol: 802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
• Data Interface: PCB, Surface Mount
• Memory Size: 256kB Flash, 4kB EEPROM, 8kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 100-CBGA and 32-QFN
• Processor Series: ATMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 8 KB
• Development Tools By Supplier: ATAVRRZ541, ATAVRRAVEN, ATAVRRZRAVEN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Power - Output: -
• Operating Temperature: -
• Applications: -
• Sensitivity: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Details

16.11.5
16.11.6
16.11.7
16.11.8
2549M–AVR–09/10
TCCR1B – Timer/Counter 1 Control Register B
TCCR3B – Timer/Counter 3 Control Register B
TCCR4B – Timer/Counter 4 Control Register B
TCCR5B – Timer/Counter 5 Control Register B
Table 16-5
correct and frequency correct PWM mode.
Table 16-5.
Note:
• Bit 7 – ICNCn: Input Capture Noise Canceler
Setting this bit (to one) activates the Input Capture Noise Canceler. When the Noise Canceler is
activated, the input from the Input Capture Pin (ICPn) is filtered. The filter function requires four
successive equal valued samples of the ICPn pin for changing its output. The input capture is
therefore delayed by four Oscillator cycles when the noise canceler is enabled.
Bit
(0x81)
Read/Write
Initial Value
Bit
(0x91)
Read/Write
Initial Value
Bit
(0xA1)
Read/Write
Initial Value
Bit
(0x121)
Read/Write
Initial Value
COMnA1
COMnB1
COMnC1
0
0
1
1
A special case occurs when OCRnA/OCRnB/OCRnC equals TOP and
COMnA1/COMnB1//COMnC1 is set.
details.
shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the phase
COMnA0
COMnB0
COMnC0
Compare Output Mode, Phase Correct and Phase and Frequency Correct PWM
ICNC1
ICNC3
ICNC4
ICNC5
R/W
R/W
R/W
R/W
7
0
7
0
7
0
7
0
0
1
0
1
ICES1
ICES4
ICES5
ICES3
R/W
R/W
R/W
R/W
6
0
6
0
6
0
6
0
disconnected (normal port operation). For all other WGM1 settings, normal
WGM13:0 =9 or 11: Toggle OC1A on Compare Match, OC1B and OC1C
Clear OCnA/OCnB/OCnC on compare match when up-counting. Set
Set OCnA/OCnB/OCnC on compare match when up-counting. Clear
ATmega640/1280/1281/2560/2561
OCnA/OCnB/OCnC on compare match when downcounting.
OCnA/OCnB/OCnC on compare match when downcounting.
Normal port operation, OCnA/OCnB/OCnC disconnected.
R
R
R
R
5
–
0
5
–
0
5
–
0
5
–
0
port operation, OC1A/OC1B/OC1C disconnected.
See “Phase Correct PWM Mode” on page 152.
WGM13
WGM33
WGM43
WGM53
R/W
R/W
R/W
R/W
4
0
0
4
0
4
0
4
WGM12
WGM42
WGM52
WGM32
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
Description
CS42
CS52
CS12
CS32
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
CS11
CS41
CS51
CS31
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
CS10
CS40
CS50
CS30
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
for more
TCCR1B
TCCR4B
TCCR5B
TCCR3B
160