EM2420-STR Ember, EM2420-STR Datasheet - Page 15

• Manufacturer Part Number: EM2420-STR
• Description: IC RF TXRX ZIGBEE 2.4GHZ 48-QLP
• Manufacturer: Ember

Specifications of EM2420-STR

• Mfg Application Notes: EM2420
• Frequency: 2.4GHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4
• Applications: ZigBee™
• Power - Output: -3dBm
• Sensitivity: -94dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 19.7mA
• Current - Transmitting: 17.4mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QLP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Memory Size: -

Circuit Description
A simplified block diagram of the
shown in Figure 2.
The
received RF signal is amplified by the low-
noise amplifier (LNA) and down-converted
in quadrature (I and Q) to the intermediate
frequency (IF). At IF (2 MHz), the complex
I/Q signal is filtered and amplified, and
then digitized by the ADCs.
gain control, final channel filtering, de-
spreading, symbol correlation and byte
synchronization are performed digitally.
When the SFD pin goes high, this indicates
that a start of frame delimiter has been
detected. The
data in a 128 byte receive FIFO. The user
may read the FIFO through an SPI
interface. CRC is verified in hardware.
RSSI and correlation values are appended
to the frame. CCA is available on a pin in
receive mode. Serial (un-buffered) data
modes
purposes.
Ember Part Number: 120-0049-000D
EM2420
On-chip
BIAS
TX/RX CONTROL
R
LNA
PA
are
16 MHz
XOSC
features a low-IF receiver. The
Control
Power
EM2420
also
Σ
available
buffers the received
Figure 2. The
Automatic
EM2420
for
0
90
EM2420
test
EM2420 Datasheet
is
simplified block diagram
AUTOMATIC GAIN CONTROL
TX POWER CONTROL
The
up-conversion. The data is buffered in a
128 byte transmit FIFO (separate from the
receive FIFO). The preamble and start of
frame
hardware. Each symbol (4 bits) is spread
using
sequence to 32 chips and output to the
digital-to-analog converters (DACs).
An analog lowpass filter passes the signal
to the quadrature (I and Q) upconversion
mixers. The RF signal is amplified in the
power amplifier (PA) and fed to the
antenna.
The internal T/R switch circuitry makes the
antenna interface and matching easy. The
RF connection is differential. A balun may
be used for single-ended antennas. The
biasing of the PA and LNA is done by
connecting TXRX_SWITCH to RF_P and
RF_N through an external DC path.
The frequency synthesizer includes a
completely on-chip LC VCO and a 90
degrees phase splitter for generating the I
ADC
ADC
SYNTH
DAC
DAC
FREQ
EM2420
the
delimiter
- Digital RSSI
- Gain Control
- Image Suppression
- Channel Filtering
- Demodulation
- Frame
- Data spreading
- Modulation
synchronization
transmitter is based on direct
DEMODULATOR
IEEE
MODULATOR
DIGITAL
DIGITAL
ENCRYPTION
INTERFACE
WITH FIFO
BUFFERS,
CRC AND
DIGITAL
are
802.15.4
EM2420
Analog test
Digital and
generated
regulator
interface
voltage
Serial
Page 15 of 84
spreading
by