EM2420-STR Ember, EM2420-STR Datasheet - Page 23

• Manufacturer Part Number: EM2420-STR
• Description: IC RF TXRX ZIGBEE 2.4GHZ 48-QLP
• Manufacturer: Ember

Specifications of EM2420-STR

• Mfg Application Notes: EM2420
• Frequency: 2.4GHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4
• Applications: ZigBee™
• Power - Output: -3dBm
• Sensitivity: -94dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 19.7mA
• Current - Transmitting: 17.4mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QLP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Memory Size: -

4-wire Serial Configuration and Data Interface
The
wire SPI-compatible interface (pins SI,
SO, SCLK and CSn) where the
the slave. This interface is also used to
read and write buffered data (see page
35). All address and data transfer on the
SPI interface is done most significant bit
first.
Register access
There are 33 16-bit configuration and
status registers, 15 command strobe
registers, and two 8-bit registers to access
the separate transmit and receive FIFOs.
Each of the 50 registers is addressed by a
6-bit address. The RAM/Register bit (bit 7)
must be cleared for register access. The
Read/Write bit (bit 6) selects a read or a
write operation and makes up the 8-bit
address field together with the 6-bit
address.
In each register read or write cycle, 24 bits
are sent on the SI-line. The CSn pin (Chip
Select, active low) must be kept low during
this transfer. The bit to be sent first is the
RAM/Register bit (set to 0 for register
access), followed by the R/W bit (0 for
write, 1 for read). The following 6 bits are
the address-bits (A5:0). A5 is the most
significant bit of the address and is sent
first. The 16 data-bits are then transferred
Ember Part Number: 120-0049-000D
EM2420
is configured via a simple 4-
EM2420
EM2420 Datasheet
is
(D15:0), also MSB first. See Figure 7 for
an illustration.
The configuration registers can also be
read by the microcontroller via the same
configuration interface. The R/W bit must
be set high to initiate the data read-back.
The
addressed register on the 16 clock cycles
following the register address. The SO pin
is used as the data output and must be
configured
microcontroller.
The timing for the programming is also
shown in Figure 7 with reference to Table
4. The clocking of the data on SI into the
EM2420
SCLK. When the last bit, D0, of the 16
data-bits has been written, the data word
is loaded in the internal configuration
register.
Multiple registers may be written without
releasing CSn, as described in the Multiple
SPI access section on page 27.
The register data will be retained during
power down mode, but not when the
power-supply is turned off (e.g., by
disabling the voltage regulator using the
VREG_EN pin). The registers can be
programmed in any order.
EM2420
is done on the positive edge of
then returns the data from the
as
an
EM2420
input
Page 23 of 84
by
the