EM2420-STR Ember, EM2420-STR Datasheet - Page 29

• Manufacturer Part Number: EM2420-STR
• Description: IC RF TXRX ZIGBEE 2.4GHZ 48-QLP
• Manufacturer: Ember

Specifications of EM2420-STR

• Mfg Application Notes: EM2420
• Frequency: 2.4GHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4
• Applications: ZigBee™
• Power - Output: -3dBm
• Sensitivity: -94dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 19.7mA
• Current - Transmitting: 17.4mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QLP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Memory Size: -

Receive mode
In receive mode, the SFD pin goes high
after the start of frame delimiter (SFD)
field has been completely received. If
address recognition is disabled or is
successful, the SFD pin goes low again
only after the last byte of the MPDU has
been received. If the received frame fails
address recognition, the SFD pin goes low
immediately. This is illustrated in Figure
11.
The FIFO pin is high when there is one or
more data bytes in the RXFIFO. The first
byte to be stored in the RXFIFO is the
length field of the received frame, i.e., the
FIFO pin is set high when the length field
is written to the RXFIFO. The FIFO pin
then remains high until the RXFIFO is
empty.
If
completely or partially inside the RXFIFO,
the FIFO pin will remain high until the
RXFIFO is empty.
The FIFOP pin is high when the number of
unread bytes in the RXFIFO exceeds the
threshold
IOCFG0.FIFOP_THR.
recognition is enabled the FIFOP pin will
not go high until the incoming frame
passes address recognition, even if the
number of bytes in the RXFIFO exceeds
the programmed threshold.
The FIFOP pin will also go high when the
last byte of a new packet is received, even
if the threshold is not exceeded. If so the
Ember Part Number: 120-0049-000D
a
previously
programmed
received
Figure 10. Microcontroller interface example
When
EM2420
FIFOP
frame
FIFO
SCLK
CCA
SFD
CSn
address
SO
SI
into
EM2420 Datasheet
is
FIFOP pin will go back to low once one
byte has been read out of the RXFIFO.
When address recognition is enabled,
data should not be read out of the RXFIFO
before the address is completely received,
since the frame may be automatically
flushed by the EM2420 if it fails address
recognition. This may be handled by using
the FIFOP pin, since this pin does not go
high until the frame passes address
recognition.
Figure 12 shows an example of pin activity
when reading a packet from the RXFIFO.
In this example, the packet size is 8 bytes,
IOCFG0.FIFOP_THR
MODEMCTRL0.AUTOCRC is set. The length
will be 8 bytes, RSSI will contain the
average RSSI level during receiving of the
packet and FCS/corr contain information
of FCS check result and the correlation
levels.
RXFIFO overflow
The RXFIFO can only contain a maximum
of 128 bytes at a given time. This may be
divided between multiple frames, as long
as the total number of bytes is 128 or less.
If an overflow occurs in the RXFIFO, this
is signalled to the microcontroller by
setting the FIFO pin low while the FIFOP
pin is high. Data already in the RXFIFO
will not be affected by the overflow, i.e.,
frames already received may be read out.
A SFLUSHRX command strobe is required
after a RXFIFO overflow to enable
reception of new data. Note that the
SFLUSHRX command strobe should be
GIO0
Interrupt
GIO1
Timer Capture
MOSI
MISO
SCLK
GIO2
µC
EM2420
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