EM2420-STR Ember, EM2420-STR Datasheet - Page 34

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EM2420-STR

Manufacturer Part Number
EM2420-STR
Description
IC RF TXRX ZIGBEE 2.4GHZ 48-QLP
Manufacturer
Ember
Datasheet

Specifications of EM2420-STR

Mfg Application Notes
EM2420
Frequency
2.4GHz
Data Rate - Maximum
250kbps
Modulation Or Protocol
802.15.4
Applications
ZigBee™
Power - Output
-3dBm
Sensitivity
-94dBm
Voltage - Supply
2.1 V ~ 3.6 V
Current - Receiving
19.7mA
Current - Transmitting
17.4mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QLP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Memory Size
-
MAC protocol data unit
The FCF, data sequence number and
address information follows the length field
as shown in Figure 15. Together with the
MAC data payload and Frame Check
Sequence, they form the MAC Protocol
Data Unit (MPDU).
The format of the FCF is shown in Figure
17. Please refer to [1] for details.
Bits: 0-2
Frame
Type
Frame check sequence
A 2-byte frame check sequence (FCS)
follows the last MAC payload byte as
shown in Figure 15. The FCS is calculated
over the MPDU, i.e., the length field is not
part of the FCS. This field is automatically
generated and verified by hardware when
the MODEMCTRL0.AUTOCRC control bit is
set. It is recommended to always have this
enabled,
purposes. If cleared, CRC generation and
verification
software.
The FCS polynomial is [1]:
The
shown in Figure 18. Please refer to [1] for
further details.
In transmit mode the FCS is appended at
the correct position defined by the length
field. The FCS is not written to the
TXFIFO, but stored in a separate 16-bit
register.
In receive mode the FCS is verified by
hardware. The user is normally only
interested in the correctness of the FCS,
Ember Part Number: 120-0049-000D
EM2420
3
Security
Enabled
except
x
must
hardware implementation is
16
+ x
4
Frame
Pending
Figure 17. Format of the Frame Control Field (FCF) [1]
12
possibly
be
+ x
5
+ 1
performed
5
Acknowledge
request
for
debug
EM2420 Datasheet
by
6
Intra
PAN
7-9
Reserved
There is no hardware support for the data
sequence number. This field must be
inserted and verified by software.
The
recognition, as described in the Address
Recognition section on page 37.
not the FCS sequence itself. The FCS
sequence itself is therefore not written to
the RXFIFO during receive.
Instead, when MODEMCTRL0.AUTOCRC is
set the two FCS bytes are replaced by the
RSSI value, average correlation value
(used for LQI) and CRC OK/not OK. This
is illustrated in Figure 19.
The first FCS byte is replaced by the 8-bit
RSSI value. See the RSSI section on
page 45 for details.
The 7 least significant bits in the last FCS
byte
correlation value of the 8 first symbols of
the received PHY header (length field) and
PHY Service Data Unit (PSDU). This
correlation value may be used as a basis
for calculating the LQI. See the Link
Quality Indication section on page 46 for
details.
The most significant bit in the last byte of
each frame is set high if the CRC of the
received
otherwise.
EM2420
are
10-11
Destination
addressing
mode
frame
replaced
includes hardware address
is
12-13
Reserved
correct
by
EM2420
the
Page 34 of 84
and
14-15
Source
addressing
mode
average
low

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