ATMEGA64A-ANR Atmel, ATMEGA64A-ANR Datasheet - Page 290

• Manufacturer Part Number: ATMEGA64A-ANR
• Description: IC MCU AVR 64K FLASH 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64A-ANR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

26.8.10
26.8.11
26.8.12
8160C–AVR–07/09
Preventing Flash Corruption
Programming Time for Flash when Using SPM
Simple Assembly Code Example for a Boot Loader
the value of the Fuse High bits (FHB) will be loaded in the destination register as shown below.
Refer to
When reading the Extended Fuse bits, load 0x0002 in the Z-pointer. When an LPM instruction is
executed within three cycles after the BLBSET and SPMEN bits are set in the SPMCSR, the
value of the Extended Fuse bits (EFB) will be loaded in the destination register as shown below.
Refer to
Fuse and Lock bits that are programmed will be read as zero. Fuse and Lock bits that are unpro-
grammed will be read as one.
During periods of low V
low for the CPU and the Flash to operate properly. These issues are the same as for board level
systems using the Flash, and the same design solutions should be applied.
A Flash program corruption can be caused by two situations when the voltage is too low. First, a
regular write sequence to the Flash requires a minimum voltage to operate correctly. Second,
the CPU itself can execute instructions incorrectly, if the supply voltage for executing instructions
is too low.
Flash corruption can easily be avoided by following these design recommendations (one is
sufficient):
1. If there is no need for a Boot Loader update in the system, program the Boot Loader Lock
2. Keep the AVR RESET active (low) during periods of insufficient power supply voltage.
3. Keep the AVR core in Power-down Sleep mode during periods of low V
The calibrated RC Oscillator is used to time Flash accesses.
gramming time for Flash accesses from the CPU.
Table 26-5.
Bit
Rd
Bit
Rd
Symbol
Flash write (Page Erase, Page Write, and
write Lock bits by SPM)
bits to prevent any Boot Loader software updates.
This can be done by enabling the internal Brown-out Detector (BOD) if the operating volt-
age matches the detection level. If not, an external low V
be used. If a reset occurs while a write operation is in progress, the write operation will be
completed provided that the power supply voltage is sufficient.
vent the CPU from attempting to decode and execute instructions, effectively protecting
the SPMCSR Register and thus the Flash from unintentional writes.
;-the routine writes one page of data from RAM to Flash
; the first data location in RAM is pointed to by the Y pointer
; the first data location in Flash is pointed to by the Z-pointer
;-error handling is not included
Table 27-4 on page 297
Table 27-3 on page 296
SPM Programming Time
FHB7
7
7
–
CC,
FHB6
6
6
–
the Flash program can be corrupted because the supply voltage is too
for detailed description and mapping of the Fuse High bits.
for detailed description and mapping of the Fuse High bits.
FHB5
5
5
–
Min Programming Time
FHB4
4
4
–
3.7 ms
FHB3
3
3
–
CC
FHB2
Table 26-5
2
2
–
Reset Protection circuit can
Max Programming Time
FHB1
EFB1
1
1
ATmega64A
shows the typical pro-
CC
. This will pre-
4.5 ms
FHB0
EFB0
0
0
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