MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 36

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

3.4.4.1.4
The MDC frequency is designed to be equal to or less than 2.5 MHz to be compatible with the IEEE 802.3
MII specification. However the ENET can function correctly with a maximum MDC frequency of
15 MHz.
Figure 12
shown in the figure.
3.4.4.2
In RMII mode, ENET_CLK is used as the REF_CLK, which is a 50 MHz ± 50 ppm continuous reference
clock. ENET0_RX_DV is used as the CRS_DV in RMII. Other signals under RMII mode include
ENET0_TX_EN, ENET0_TXD[1:0], ENET0_RXD[1:0] and ENET0_RX_ER.
36
M10
M11
M12
M13
M14
M15
ID
ENET0_MDIO (output)
ENET0_MDC (output)
ENET0_MDIO (input)
ENET0_MDC falling edge to ENET0_MDIO output invalid (min.
propagation delay)
ENET0_MDC falling edge to ENET0_MDIO output valid (max.
propagation delay)
ENET0_MDIO (input) to ENET0_MDC rising edge setup
ENET0_MDIO (input) to ENET0_MDC rising edge hold
ENET0_MDC pulse width high
ENET0_MDC pulse width low
shows MII asynchronous input timings.
RMII Mode Timing
MII Serial Management Channel Timing (ENET0_MDIO and ENET0_MDC)
i.MX28 Applications Processor Data Sheet for Consumer Products, Rev. 0
Figure 12. MII Serial Management Channel Timing Diagram
Table 41. MII Serial Management Channel Timing
Characteristic
M12
M13
Table 41
M14
describes the timing parameters (M10–M15)
Min.
40%
40%
M10
18
—
0
0
M11
M15
Max.
60%
60%
—
—
—
5
Freescale Semiconductor
ENET0_MDC period
ENET0_MDC period
Unit
ns
ns
ns
ns