S1D13743F00A200 Epson, S1D13743F00A200 Datasheet - Page 70

• Manufacturer Part Number: S1D13743F00A200
• Description: LCD Drivers LCD CNTRL w/Embedded 464KB SRAM
• Manufacturer: Epson

Specifications of S1D13743F00A200

• Maximum Clock Frequency: 33 MHz, 68.59 MHz
• Operating Supply Voltage: 1.5 V
• Maximum Operating Temperature: + 85 C
• Package / Case: QFP-20-144
• Attached Touch Screen: No
• Maximum Supply Current: 74 mA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Page 70
bit 6
bit 5
bit 4
bit 2
bits 1-0
S1D13743
X70A-A-001-02
Horizontal Non-Display Period Status (Read Only)
This bit indicates whether the LCD panel output is in a horizontal non-display period
(HNDP). HNDP is defined as the time between the last pixel in line n to the first pixel in
line n+1.
When this bit = 0, the LCD panel output is in a Horizontal Non-Display Period.
When this bit = 1, the LCD panel output is in a Horizontal Display Period.
VP OR’d with HDP Status (Read Only)
This bit indicates whether the LCD panel is in a display period or a non-display period.
When this bit = 0, the LCD panel is in a Display period.
When this bit = 1, the LCD panel is in either a Horizontal or Vertical Non-Display period.
YYC Last Line
This bit indicates the status of the YYC (YUV to YUV Converter). If the Input Data For-
mat is YUV 4:2:0 (REG[2Ah] bits 3-0 = 1001b), this bit goes high 5 MCLKs after the
Intel 80 interface completes writing the last pixel of the current window. The bit goes low
once the YYC returns to an idle state. At this point, a new window can be written.
When this bit = 0, the YYC is idle.
When this bit = 1, the YYC is converting YUV 4:2:0 data.
When doing back-to-back window writes with a different dimension or format, and the
first window is YUV 4:2:0, this bit must be low (0) before starting to write the second
window.
TE Output Pin Enable
This bit controls the TE output pin.
When this bit = 0, the TE output pin is disabled.
When this bit = 1, the TE output pin is enabled.
TE Output Pin Function Select bits [1:0]
These bits select which function is indicated by the TE output pin.
REG[58h] bits 1-0
Table 10-14: TE Output Pin Function Selection
00b
01b
10b
11b
Revision 2.7
Horizontal Non-Display Period
Vertical Non-Display Period
TE Output Pin Function
HS OR’d with VS
Reserved
Epson Research and Development
Hardware Functional Specification
Vancouver Design Center
Issue Date: 2010/05/18