LAN8710A-EZK-TR SMSC, LAN8710A-EZK-TR Datasheet - Page 33

• Manufacturer Part Number: LAN8710A-EZK-TR
• Description: Ethernet ICs 10/100 Ethernet XCVR w/HPAutoMDIX FlexPwr
• Manufacturer: SMSC
• Type: Single Chipr

Specifications of LAN8710A-EZK-TR

• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Transceivers
• Number Of Transceivers: 1
• Standard Supported: IEEE 802.3 or IEEE 802.3u
• Data Rate: 125 Mbps
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.6 V or 3 V
• Maximum Operating Temperature: + 85 C
• Package / Case: QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR
Datasheet
SMSC LAN8710A/LAN8710Ai
3.6
3.6.1
30.7
30.6
30.5
30.4
30.3
30.2
30.1
MASK
29.7
29.6
29.5
29.4
29.3
29.2
29.1
INTERRUPT SOURCE
The device management interface supports an interrupt capability that is not a part of the IEEE 802.3
specification. This interrupt capability generates an active low asynchronous interrupt signal on the
nINT output whenever certain events are detected as setup by the
The device’s interrupt system provides two modes, a Primary Interrupt mode and an Alternative
interrupt mode. Both systems will assert the nINT pin low when the corresponding mask bit is set.
These modes differ only in how they de-assert the nINT interrupt output. These modes are detailed in
the following subsections.
Note: The Primary interrupt mode is the default interrupt mode after a power-up or hard reset. The
Primary Interrupt System
The Primary interrupt system is the default interrupt mode
Register
mode, to set an interrupt, set the corresponding mask bit in the
Then when the event to assert nINT is true, the nINT output will be asserted. When the corresponding
event to deassert nINT is true, then the nINT will be de-asserted.
Note 3.3
Note: The
Interrupt Management
Auto-Negotiation
Remote Fault
Link Down
Auto-Negotiation
Parallel Detection
Auto-Negotiation
ENERGYON
complete
Detected
LP Acknowledge
Fault
Page Received
Alternative interrupt mode requires setup after a power-up or hard reset.
signal acquisition process, therefore the
FLAG
is “0”). The Primary interrupt system is always selected after power-up or hard reset. In this
If the mask bit is enabled and nINT has been de-asserted while ENERGYON is still high,
nINT will assert for 256 ms, approximately one second after ENERGYON goes low when
the Cable is unplugged. To prevent an unexpected assertion of nINT, the ENERGYON
interrupt mask should always be cleared as part of the ENERGYON interrupt service
routine.
ENERGYON
Table 3.3 Interrupt Management Table
bit in the
17.1
1.5
1.4
1.2
5.14
6.4
6.1
INTERRUPT SOURCE
DATASHEET
Mode Control/Status Register
ENERGYON
Auto-Negotiate
Complete
Remote Fault
Link Status
Acknowledge
Parallel
Detection Fault
Page Received
33
®
Technology
INT7
bit in the
Rising 17.1
(Note
Rising 1.5
Rising 1.4
Falling 1.2
Rising 5.14
Rising 6.4
Rising 6.1
ASSERT nINT
EVENT TO
(ALTINT
3.3)
Interrupt Mask Register
Interrupt Mask Register
is defaulted to a ‘1’ at the start of the
Interrupt Mask
bit of the
Falling 17.1 or
Reading register 29
Falling 1.5 or
Reading register 29
Falling 1.4, or
Reading register 1 or
Reading register 29
Reading register 1 or
Reading register 29
Falling 5.14 or
Read register 29
Falling 6.4 or
Reading register 6, or
Reading register 29
or
Re-Auto Negotiate or
Link down
Falling of 6.1 or
Reading register 6, or
Reading register 29
Re-Auto Negotiate, or
Link Down.
DE-ASSERT nINT
Mode Control/Status
Revision 1.2 (11-10-10)
Register.
EVENT TO
(see
will also read
Table
3.3).