A3P1000L-PQG208 Actel, A3P1000L-PQG208 Datasheet - Page 61
A3P1000L-PQG208
Manufacturer Part Number
A3P1000L-PQG208
Description
FPGA - Field Programmable Gate Array 1M SYSTEM GATES
Manufacturer
Actel
Datasheet
1.A3P250L-VQG100.pdf
(224 pages)
Specifications of A3P1000L-PQG208
Processor Series
A3P1000
Core
IP Core
Maximum Operating Frequency
781.25 MHz
Number Of Programmable I/os
154
Data Ram Size
147456
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Gates
1 M
Package / Case
PQFP-208
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
A3P1000L-PQG208
Manufacturer:
Microsemi SoC
Quantity:
10 000
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Table 2-62 • Minimum and Maximum DC Input and Output Levels
Table 2-63 • Minimum and Maximum DC Input and Output Levels
2.5 V LVCMOS
Drive Strength
4 mA
8 mA
12 mA
16 mA
24 mA
Notes:
1. Currents are measured at 100°C junction temperature and maximum voltage.
2. Currents are measured at 85°C junction temperature.
3. Software default selection highlighted in gray.
2.5 V LVCMOS
Drive Strength
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
24 mA
Notes:
1. Currents are measured at 100°C junction temperature and maximum voltage.
2. Currents are measured at 85°C junction temperature.
3. Software default selection highlighted in gray.
2.5 V LVCMOS
Low-Voltage CMOS for 2.5 V is an extension of the LVCMOS standard (JESD8-5) used for general-
purpose 2.5 V applications. It uses a 5 V–tolerant input buffer and push-pull output buffer.
Applicable to Pro I/Os
Applicable to Advanced I/O Banks
Min.
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
V
Min.
–0.3
–0.3
–0.3
–0.3
–0.3
V
VIL
VIL
Max.
0.7
0.7
0.7
0.7
0.7
0.7
0.7
V
Max.
0.7
0.7
0.7
0.7
0.7
V
Min.
1.7
1.7
1.7
1.7
1.7
1.7
1.7
V
Min.
1.7
1.7
1.7
1.7
1.7
V
VIH
VIH
Max.
2.7
2.7
2.7
2.7
2.7
2.7
2.7
V
Max.
2.7
2.7
2.7
2.7
2.7
V
Max.
VOL
0.7
0.7
0.7
0.7
0.7
0.7
0.7
V
R e v i s i o n 9
Max.
VOL
0.7
0.7
0.7
0.7
0.7
V
VOH
Min.
1.7
1.7
1.7
1.7
1.7
1.7
1.7
V
VOH
Min.
1.7
1.7
1.7
1.7
1.7
V
mA mA
I
12 12
16 16
24 24
OL
2
4
6
8
I
OH
2
4
6
8
mA mA
I
OL
12
16
24
4
8
I
ProASIC3L Low Power Flash FPGAs
OH
12
16
24
4
8
Max.
mA
I
169
OSL
16
16
32
32
65
83
1
Max.
mA
I
169
OSL
16
32
65
83
1
Max.
I
mA
124
OSH
Max.
18
18
37
37
74
87
I
mA
124
OSH
18
37
74
87
1
1
µA
µA
I
10
10
10
10
10
IL
I
10
10
10
10
10
10
10
IL
2
2
µA
µA
I
2- 47
10
10
10
10
I
10
10
10
10
10
10
10
10
IH
IH
2
2
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