ML610Q429-NNNTBZ03A7 Rohm Semiconductor, ML610Q429-NNNTBZ03A7 Datasheet - Page 84
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ML610Q429-NNNTBZ03A7
Manufacturer Part Number
ML610Q429-NNNTBZ03A7
Description
MCU 8BIT 48K FLASH 128-TQFP
Manufacturer
Rohm Semiconductor
Datasheets
1.ML610Q482P-NNNTB03A7.pdf
(20 pages)
2.ML610Q428-NNNTBZ03A7.pdf
(32 pages)
3.ML610Q428-NNNTBZ03A7.pdf
(434 pages)
Specifications of ML610Q429-NNNTBZ03A7
Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ML610Q429-NNNTBZ03A7
Manufacturer:
Rohm
Quantity:
900
Company:
Part Number:
ML610Q429-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
- ML610Q482P-NNNTB03A7 PDF datasheet
- ML610Q428-NNNTBZ03A7 PDF datasheet #2
- ML610Q428-NNNTBZ03A7 PDF datasheet #3
- Current page: 84 of 434
- Download datasheet (3Mb)
State B: Non-maskable interrupt is being processed
B-1: When no instruction is executed in an interrupt routine
B-2: When one or more instructions are executed in an interrupt routine
Example of description: B-1
Intrpt_B-1:
Example of description: B-2-2
Intrpt_B-2-2:
PUSH ELR,EPSW,LR
BL Sub_1
POP PC,PSW,LR
RTI
:
:
:
:
B-2-1: When a subroutine is not called by the program in executing an interrupt routine
B-2-2: When a subroutine is called by the program in executing an interrupt routine
• Processing immediately after the start of interrupt routine execution
Specify “POP PC, PSW, LR” instead of the RTI instruction to return the saved data of the interrupt return address
to PC, the saved data of EPSW to PSW, and the saved data of LR to LR..
Specify the RTI instruction to return the contents of the ELR register to the PC and those of the EPSW register
to PSW.
• Processing immediately after the start of interrupt routine execution
• Processing at the end of interrupt routine execution
• Processing immediately after the start of interrupt routine execution
• Processing at the end of interrupt routine execution
Specify “PUSH ELR, EPSW” to save the interrupt return address and the PSW status in the stack.
Specify “POP PC, PSW” instead of the RTI instruction to return the contents of the stack to PC and PSW.
Specify “PUSH LR, ELR, EPSW” to save the interrupt return address, the subroutine return address, and the
EPSW status in the stack.
; B-1 state
; Return PC from ELR
; Return PSW form EPSW
; End
; Start
; Save ELR, EPSW, LR at the
beginning
; Call subroutine Sub_1
; Return PC from the stack
; Return PSW from the stack
; Return LR from the stack
; End
5 – 25
Example of description: B-2-1
Intrpt_B-2-1:
Sub_1:
PUSH ELR,EPSW
RT
:
:
:
POP PC,PSW
:
:
:
:
ML610Q428/ML610Q429 User’s Manual
Chapter 5 Interrupts (INTs)
;
; Return PC from LR
; End of subroutine
; Start
; Save ELR, EPSW at the
beginning
; Return PC from the stack
; Return PSW from the stack
; End
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