ML610Q429-NNNTBZ03A7 Rohm Semiconductor, ML610Q429-NNNTBZ03A7 Datasheet - Page 85

no-image

ML610Q429-NNNTBZ03A7

Manufacturer Part Number
ML610Q429-NNNTBZ03A7
Description
MCU 8BIT 48K FLASH 128-TQFP
Manufacturer
Rohm Semiconductor

Specifications of ML610Q429-NNNTBZ03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ML610Q429-NNNTBZ03A7
Manufacturer:
Rohm
Quantity:
900
Part Number:
ML610Q429-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
5.3.5
Even if the interrupt conditions are satisfied, an interrupt may not be accepted depending on the operating state. This is
called an interrupt disabled state. See below for the interrupt disabled state and the handling of interrupts in this state.
Interrupt disabled state 1:
Interrupt disabled state 2:
Reference:
For the DSR prefix instruction, see “nX-U8/100 Core Instruction Manual”.
When the interrupt conditions are satisfied in this section, an interrupt is generated immediately following the
execution of the instruction at the beginning of the interrupt routine corresponding to the interrupt that has already
been enabled.
When the interrupt conditions are satisfied in this section, an interrupt is generated immediately after execution of
the instruction following the DSR prefix instruction.
Interrupt Disable State
Between the interrupt shift cycle and the instruction at the beginning of the interrupt
routine
Between the DSR prefix instruction and the next instruction
5 – 26
ML610Q428/ML610Q429 User’s Manual
Chapter 5 Interrupts (INTs)

Related parts for ML610Q429-NNNTBZ03A7