ADXL180WCPZ-RL Analog Devices Inc, ADXL180WCPZ-RL Datasheet - Page 15

IC ACCELEROMETER CONFIG 16-LFCSP

ADXL180WCPZ-RL

Manufacturer Part Number
ADXL180WCPZ-RL
Description
IC ACCELEROMETER CONFIG 16-LFCSP
Manufacturer
Analog Devices Inc
Series
iMEMS®r
Datasheet

Specifications of ADXL180WCPZ-RL

Axis
X or Y
Acceleration Range
±50g, 100g, 150g, 200g, 250g, 350g, 500g
Voltage - Supply
5 V ~ 14.5 V
Output Type
Analog
Bandwidth
100Hz ~ 800Hz Selectable
Mounting Type
Surface Mount
Package / Case
16-LFQFN, CSP Exposed Pad
Package Type
LFCSP EP
Operating Supply Voltage (min)
5V
Operating Temperature (min)
-40C
Operating Temperature (max)
125C
Operating Temperature Classification
Automotive
Product Depth (mm)
5mm
Product Height (mm)
1.43mm
Product Length (mm)
5mm
Mounting
Surface Mount
Pin Count
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Sensitivity
-
Interface
-
Lead Free Status / Rohs Status
Compliant
Other names
ADXL180WCPZ-RLCT
COMMUNICATIONS TIMING AND BUS TOPOLOGIES
DATA TRANSMISSION
The analog data (available to the user by enabling the V
output) is sampled every 228 μs when the device is configured
to run asynchronously. In synchronous operation, an ADC
conversion is triggered upon the detection of a valid sync pulse.
In both cases, the data is held until a subsequent ADC
conversion is performed. This results in an additional time
delay of either 228 μs or one sync pulse period from the
(38µs CONVERSION
ADC CONVERSION
ADXL180 RETURN
ACCELERATION
EVERY 228µs.)
WAVEFORM
CURRENT
DIGITAL
INPUT
Figure 10. Asynchronous Data Transmission (Timing Not To Scale)
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SCO
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Rev. A | Page 15 of 60
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THE DATA ACQUIRED DURING A GIVEN ADC CYCLE IS NOT
TRANSMITTED UNTIL A SUBSEQUENT DATA ACQUISITION
IS PERFORMED. IN ASYNCHRONOUS OPERATION MODE,
THIS DELAY 228µs.
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sampling of the analog data to when it is transmitted via
manchester encoded data. Analog-to-digital conversions are
performed prior to the device entering run-time mode
(Phase 5) thereby ensuring that the data from the ADC is never
in an unknown state. This holds true upon receipt of the first
sync pulse in run-time mode (Phase 5).
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ADXL180

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