ADXL180WCPZ-RL Analog Devices Inc, ADXL180WCPZ-RL Datasheet - Page 38

• Manufacturer Part Number: ADXL180WCPZ-RL
• Description: IC ACCELEROMETER CONFIG 16-LFCSP
• Manufacturer: Analog Devices Inc
• Series: iMEMS®r

Specifications of ADXL180WCPZ-RL

• Axis: X or Y
• Acceleration Range: ±50g, 100g, 150g, 200g, 250g, 350g, 500g
• Voltage - Supply: 5 V ~ 14.5 V
• Output Type: Analog
• Bandwidth: 100Hz ~ 800Hz Selectable
• Mounting Type: Surface Mount
• Package / Case: 16-LFQFN, CSP Exposed Pad
• Package Type: LFCSP EP
• Operating Supply Voltage (min): 5V
• Operating Temperature (min): -40C
• Operating Temperature (max): 125C
• Operating Temperature Classification: Automotive
• Product Depth (mm): 5mm
• Product Height (mm): 1.43mm
• Product Length (mm): 5mm
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Sensitivity: -
• Interface: -
• Lead Free Status / Rohs Status: Compliant
• Other names: ADXL180WCPZ-RLCT

ADXL180
Internal Self-Test
The internal mode self-test applies an electrostatic force to
the sensor (simulating an acceleration force) and measures
the change in the sensor output value. A self-test cycle (t
constitutes one activation and deactivation of the self-test
force. A self-test cycle is considered passed if the change in
the sensor output value falls within the expected minimum
and maximum self-test response levels. The internal self-test
(Phase 3) is exited and Phase 4 is entered upon completing
the second of any two successful self-test cycles.
A self-test cycle is considered failed if the change in the sensor
output value is not within the expected levels. The self-test cycle
is then repeated. The self-test cycle is run a maximum of six
times. The internal self-test (Phase 3) is exited and the error
state entered if fewer than two of the six self-test cycles pass.
Once the error state is entered, the self-test error code is
transmitted until the device is reset.
The internal self-test sequence is as follows:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Wait 32 consecutive ADC samples.
Average 64 consecutive ADC samples (V
Enable self-test voltage.
Wait 32 consecutive ADC samples.
Average 64 consecutive ADC samples (V
Disable self-test voltage.
Wait 32 consecutive ADC samples.
Average 64 consecutive ADC samples (V
Compare measured values.
a.
b.
CURRENT
Compare (V
offset tolerance.
Compare (V
offset tolerance.
LOOP
STC
I
I
IDLE
MOD
t
STI
STZ1
STZ2
) to specified minimum and maximum
) to specified minimum and maximum
t
t
STC
STI
t
STI
STZ1
ST
STZ2
P).
).
).
Figure 28. External Self-Test Control Timing
STC
)
Rev. A | Page 38 of 60
PHASE 3
TIME
t
ST
10. If any measurements in Step 9 fail to achieve the defined
11. If fewer than two out of the six self-test cycles pass, an internal
12. Phase 4 is entered upon completing the second of any two
Influence of MD Selections On Transmitted Self-Test Data
Table 36. Phase 3 Data Transmitted During Internal Self-Test
MD1
0
0
1
1
When the internal self-test mode is selected, the type of data
transmitted during Phase 3 is dependent on the setting of the
Phase 2 mode select bits (MD1 and MD0). See Table 36 and
Table 39 for the Device OK code. See the Phase 2: Device Data
Transmission section for specifics of the delimiter and range codes.
c.
d.
e.
f.
limits, then repeat Step 1 through Step 9. Repeat a maximum
of five times.
self-test error flag is set. The error state is then entered. The
self-test error code is sent until the device is reset.
successful self-test cycles.
Calculate difference (V
specified minimum and maximum difference.
Calculate the absolute difference (V
compare to the maximum value.
If delta is less than or equal to four counts (10 bits),
then the self-test is a pass.
If delta is greater than or equal to five counts (10 bits),
then the self-test is a fail.
MD0
0
1
0
1
STP
) − (V
Data
Device OK
Range
Delimiter
Device OK
STZ1
) and compare to
t
STI
STZ1
) − (V
PHASE 4
STZ2
) and