AT90USB647-MU Atmel, AT90USB647-MU Datasheet - Page 89
AT90USB647-MU
Manufacturer Part Number
AT90USB647-MU
Description
MCU, 8BIT, 64K FLASH, USB, 64QFN
Manufacturer
Atmel
Specifications of AT90USB647-MU
Controller Family/series
AT90
No. Of I/o's
48
Eeprom Memory Size
2KB
Ram Memory Size
4KB
Cpu Speed
16MHz
No. Of
RoHS Compliant
Core Size
8bit
Program Memory Size
64KB
Oscillator Type
External, Internal
Package
64QFN EP
Device Core
AVR
Family Name
AT90
Maximum Speed
20 MHz
Ram Size
4 KB
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
48
Interface Type
SPI/TWI/USART/USB
On-chip Adc
8-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
4
Lead Free Status / Rohs Status
Details
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10.3.7
7593K–AVR–11/09
Alternate Functions of Port F
The Port F has an alternate function as analog input for the ADC as shown in
some Port F pins are configured as outputs, it is essential that these do not switch when a con-
version is in progress. This might corrupt the result of the conversion. If the JTAG interface is
enabled, the pull-up resistors on pins PF7(TDI), PF5(TMS), and PF4(TCK) will be activated even
if a Reset occurs.
Table 10-18. Port F Pins Alternate Functions
• TDI, ADC7 – Port F, Bit 7
ADC7, Analog to Digital Converter, Channel 7
TDI, JTAG Test Data In: Serial input data to be shifted in to the Instruction Register or Data Reg-
ister (scan chains). When the JTAG interface is enabled, this pin can not be used as an I/O pin.
• TDO, ADC6 – Port F, Bit 6
ADC6, Analog to Digital Converter, Channel 6
TDO, JTAG Test Data Out: Serial output data from Instruction Register or Data Register. When
the JTAG interface is enabled, this pin can not be used as an I/O pin.
The TDO pin is tri-stated unless TAP states that shift out data are entered.
• TMS, ADC5 – Port F, Bit 5
ADC5, Analog to Digital Converter, Channel 5
TMS, JTAG Test Mode Select: This pin is used for navigating through the TAP-controller state
machine. When the JTAG interface is enabled, this pin can not be used as an I/O pin.
• TCK, ADC4 – Port F, Bit 4
ADC4, Analog to Digital Converter, Channel 4
TCK, JTAG Test Clock: JTAG operation is synchronous to TCK. When the JTAG interface is
enabled, this pin can not be used as an I/O pin.
• ADC3 – ADC0 – Port F, Bit 3..0
Port Pin
PF7
PF6
PF5
PF4
PF3
PF2
PF1
PF0
Alternate Function
ADC7/TDI (ADC input channel 7 or JTAG Test Data Input)
ADC6/TDO (ADC input channel 6 or JTAG Test Data Output)
ADC5/TMS (ADC input channel 5 or JTAG Test Mode Select)
ADC4/TCK (ADC input channel 4 or JTAG Test ClocK)
ADC3 (ADC input channel 3)
ADC2 (ADC input channel 2)
ADC1 (ADC input channel 1)
ADC0 (ADC input channel 0)
.
.
.
.
AT90USB64/128
Table
10-18. If
89
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