AC80566UC005DE S LB2C Intel, AC80566UC005DE S LB2C Datasheet - Page 23
AC80566UC005DE S LB2C
Manufacturer Part Number
AC80566UC005DE S LB2C
Description
MPU, ATOM PROCESSOR, Z510, U-FCBGA
Manufacturer
Intel
Series
ATOM - Z5xxr
Datasheet
1.AC80566UE025DW_S_LB6P.pdf
(73 pages)
Specifications of AC80566UC005DE S LB2C
Core Size
32bit
Program Memory Size
512KB
Cpu Speed
400MHz
Digital Ic Case Style
FCBGA
No. Of Pins
441
Supply Voltage Range
0.75V To 1.1V
Operating Temperature Range
0°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Low Power Features
2.3
Datasheet
Enhanced Intel SpeedStep® Technology
The processor features Enhanced Intel SpeedStep® Technology. The following are the
key features of Enhanced Intel SpeedStep® Technology:
• Multiple voltage and frequency operating points providing optimal performance at
• Voltage and frequency selection is software controlled by writing to processor
• The processor controls voltage ramp rates internally to ensure glitch free
• Low transition latency and a large number of transitions are possible per second:
• Improved Intel Thermal Monitor mode:
• Enhanced thermal management features:
the lowest power.
MSRs:
transitions.
— The bus protocol (BNR# mechanism) is used to block snooping.
If the target frequency is higher than the current frequency, V
If the target frequency is lower than the current frequency, the PLL locks to
Software transitions are accepted at any time. If a previous transition is in
Processor core (including L2 cache) is unavailable for up to 10 µs during the
When the on-die thermal sensor indicates that the die temperature is too high,
The processor waits for a fixed time period. If the die temperature is down to
An interrupt is generated for the up and down Intel Thermal Monitor
Digital Thermal Sensor and Out of Specification detection
Intel Thermal Monitor 1 (TM1) in addition to Intel Thermal Monitor 2 (TM2) in
in steps by placing new values on the VID pins and the PLL then locks to the
new frequency.
the new frequency and the V
progress, the new transition is deferred until the previous transition
completes.
frequency transition.
the processor can automatically perform a transition to a lower frequency and
voltage specified in a software programmable MSR.
acceptable levels, an up transition to the previous frequency and voltage point
occurs.
transitions enabling better system level thermal management.
case of unsuccessful TM2 transition.
CC
is changed through the VID pin mechanism.
CC
is ramped up
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