SCANSTA101SM National Semiconductor, SCANSTA101SM Datasheet - Page 13

• Manufacturer Part Number: SCANSTA101SM
• Description: IC,Test/JTAG Support,CMOS,BGA,49PIN,PLASTIC
• Manufacturer: National Semiconductor

Specifications of SCANSTA101SM

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

SHIFTER
The Shifter block contains two 32-bit shift registers for
TDO_SM and TDI_SM respectively, and one 16-bit shift reg-
ister for TMS_SM. The TMS_SM shifter block diagram is
shown in Figure 2, the TDO_SM shifter block diagram is
shown in Figure 3, and the TDI_SM shifter block diagram is
shown in Figure 4.
Before the start of a vector processing the TMS_SM shifter is
loaded with the least significant 16 bits of the macro structure.
Based on the pre-shift TCK_SM count, the TMS_SM shifter
will skip (7 - pre-shift count) least significant bits. e.g., if the
pre-shift count is 4, the least significant 3 bits of the TMS_SM
Similarly, reading from TDI_SM memory can be accom-
plished by two consecutive reads. When reading from the
FIGURE 2. TMS_SM Shifter
FIGURE 3. TDO_SM Shifter
FIGURE 4. TDI_SM Shifter
13
shifter will not be used to drive TMS_SM during pre-shift.
Similarly, if the post-shift is less than 7 then, during post shift
only the number of bits equal to the post-shift count following
the macro structure bit 8 will be used to drive TMS_SM.
The STA101 memory is organized in big Endian format. Since
a memory write can be accomplished by two consecutive
writes to the same location when embedded software loads
the TDO_SM memory, it is assumed that the least significant
16 bits are written first and then the most significant 16 bits.
Therefore, when the Sequencer or a Vector is initialized the
SSIC can directly fetch and load the long word to the TDO_SM
shifter without any modification.
TDI_SM memory, the first read will contain the least signifi-
cant 16 bits and the second read the most significant 16 bits.
10121522
10121521
10121523
www.national.com