SCANSTA101SM National Semiconductor, SCANSTA101SM Datasheet - Page 14

• Manufacturer Part Number: SCANSTA101SM
• Description: IC,Test/JTAG Support,CMOS,BGA,49PIN,PLASTIC
• Manufacturer: National Semiconductor

Specifications of SCANSTA101SM

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

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The TDI_SM shifter unit consists of two 32-bit shift registers
as shown in Figure 4. The shift register on top will be used as
an LFSR register. However, before using the TDI_SM LFSR
register, the LFSR Exponent and LFSR Seed registers must
be written with valid data. The LFSR Exponent register must
be written with a 3-bit binary encoded value such that the cor-
responding polynomial out of the five available polynomials
will be selected. The value written to the LFSR Seed registers
will be used to initialize the TDI_SM LFSR register to a pre-
determined state. Once the test vector has completely
scanned in, the final contents of the LFSR register will be
transferred to the LFSR Result registers. The 32-bit shift reg-
ister at the bottom will be used to shift in TDI_SM directly in
normal mode or to shift in TMS_SM or TDO_SM in the loop-
COMPARATOR AND EXPECTED/MASK REGISTERS
The One Bit Comparator, when enabled, will compare
TDI_SM input with expected data. When the compare feature
is enabled (pre-load only) the SSIC pre-fetches data into Ex-
pected and Mask registers from the address locations per-
taining to the current vector being processed. The comparator
FIGURE 5. Shift Register Implementation and Timing
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back mode. After shifting in every thirty two bits, the contents
of this register will be transferred to the corresponding TDI
memory location before the next shift operation.
SHIFTER IMPLEMENTATION
Shift register implementation is illustrated in Figure 5. Shift out
enable for the TMS_SM and TDO_SM shifters is generated
by comparing the clock pulse counter output to the clock di-
vider - 1. Shift in enable for the TDI_SM shifter is generated
by comparing the clock pulse counter to programmable divi-
sor/2 - 1. These enables are gated by the control signals from
SSIC so that data are shifted out (TMS_SM/TDO_SM) or
shifted in (TDI_SM) only when necessary.
will compare each bit on the TDI_SM input with the corre-
sponding bit from the expected register. If the mask feature is
enabled, then the comparison is performed only on those bits
that are not masked, i.e., on those bits whose mask is set to
zero. Table 12 shows how Compare and Use Mask/Compare
bits in the Macro Structure will be used.
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