IPTR-C2H-NIOS Altera, IPTR-C2H-NIOS Datasheet - Page 15

• Manufacturer Part Number: IPTR-C2H-NIOS
• Description: IP CORE Renewal Of IPT-C2H-NIOS
• Manufacturer: Altera

Specifications of IPTR-C2H-NIOS

• Software Application: IP CORE, NIOS Processor And Functions
• Core Architecture: Nios II
• Features: ANSI C Compliance, Straightforward C-to-Hardware Mapping, Reporting Of Generated Results
• Core Sub-architecture: Cyclone
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

Figure 1–1. Example System Topology with Single Hardware Accelerator
Altera Corporation
November 2009
Avalon
Switch
Fabric
Instruction
Instruction
Memory
M
S
Processor
Write Data & Control Path
Read Data
Nios II
System Architecture
Figure 1–1
that includes one hardware accelerator.
SOPC Builder automatically integrates the accelerator logic into the
system as an SOPC Builder component. If there is more than one
accelerator in the system, multiple accelerators appear in SOPC Builder.
Accelerators are separate from the Nios II processor but can access the
same memory devices that the Nios II processor can.
Data
M
Peripherals
MUX
S
shows the architecture of a simple Nios II processor system
Memory
9.1
Data
S
Arbitrator
M
S
Avalon Slave Port
Avalon Master Port
M
Accelerator
Hardware
Control
S
Memory
Data
Arbitrator
S
Introduction to the C2H Compiler
Nios II C2H Compiler User Guide
M
1–9