IPTR-C2H-NIOS Altera, IPTR-C2H-NIOS Datasheet - Page 42
IPTR-C2H-NIOS
Manufacturer Part Number
IPTR-C2H-NIOS
Description
IP CORE Renewal Of IPT-C2H-NIOS
Manufacturer
Altera
Datasheet
1.IPT-C2H-NIOS.pdf
(138 pages)
Specifications of IPTR-C2H-NIOS
Software Application
IP CORE, NIOS Processor And Functions
Core Architecture
Nios II
Features
ANSI C Compliance, Straightforward C-to-Hardware Mapping, Reporting Of Generated Results
Core Sub-architecture
Cyclone
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
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One-to-One C-to-Hardware Mapping
3–2
Nios II C2H Compiler User Guide
Table 3–1
function.
Assignments
A C assignment operator stores the value of an expression to a variable.
As a general rule, every assignment operator in the C code, such as =,
translates to a registered signal in hardware. The value of an assignment's
expression is calculated in one clock cycle.
hardware that results from the following statement:
Figure 3–1. Hardware Resulting from Assignment
while (len > 0) {
result += *a++ * *b++;
len--;
Table 3–1. Hardware Structure for Arithmetic and Logical Operators
int sum = x + y;
lists the equivalent hardware structures resulting from this
Line
9.1
*
C Element
*
while
(multiply)
(pointer)
+=
++
--
>
Figure 3–1
Finite state machine with
nominal control logic. Refer to
section
page
32-bit comparator
64-bit adder
Avalon-MM master port to read
data (two total for
*b++
“Indirection Operator (Pointer
Dereference)” on page
32-bit up-counter (two total for
*a++
32x32=64-bit multiplier
32-bit down-counter
3–5.
). Refer to section
Hardware Structure
and
“Iteration Statements” on
shows the
*b++
Altera Corporation
November 2009
)
*a++
3–16.
and
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