IPTR-C2H-NIOS Altera, IPTR-C2H-NIOS Datasheet - Page 90

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IPTR-C2H-NIOS

Manufacturer Part Number
IPTR-C2H-NIOS
Description
IP CORE Renewal Of IPT-C2H-NIOS
Manufacturer
Altera
Datasheet

Specifications of IPTR-C2H-NIOS

Software Application
IP CORE, NIOS Processor And Functions
Core Architecture
Nios II
Features
ANSI C Compliance, Straightforward C-to-Hardware Mapping, Reporting Of Generated Results
Core Sub-architecture
Cyclone
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
Scheduling
Example 3–38. Pipelined Subfunction
int MAX(int a, int b)
{
}
#pragma altera_accelerate connect_variable MAX_loop/a to sdram
#pragma altera_accelerate connect_variable MAX_loop/b to
onchip_ram_64_kbytes
int MAX_loop(int * _ _restrict_ _ a, int * __restrict__ b)
{
}
3–50
Nios II C2H Compiler User Guide
return ((a > b)? a : b);
int i, c = 0;
for (i = 0; i < 1024; i++)
{
}
return c;
c += MAX(a[i], b[i]);
If the subfunction performs a memory access that stalls, then the outer
state machine also stalls.
Pipelined subfunctions provide a useful option for controlling shared
resources. For further information, see
9.1
“Resource
Sharing”.
Altera Corporation
November 2009

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