AD9522-1BCPZ-REEL7 Analog Devices Inc, AD9522-1BCPZ-REEL7 Datasheet - Page 3

12- Channel Clock Generator W/Int VCO

AD9522-1BCPZ-REEL7

Manufacturer Part Number
AD9522-1BCPZ-REEL7
Description
12- Channel Clock Generator W/Int VCO
Manufacturer
Analog Devices Inc
Type
Clock Generator, Fanout Distributionr
Datasheet

Specifications of AD9522-1BCPZ-REEL7

Pll
Yes
Input
CMOS, LVDS, LVPECL
Output
CMOS, LVDS
Number Of Circuits
1
Ratio - Input:output
2:12, 2:24
Differential - Input:output
Yes/Yes
Frequency - Max
2.65GHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Frequency-max
2.5GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Serial Control Port .......................................................................... 50
REVISION HISTORY
11/08—Revision 0: Initial Version
Reset Modes ................................................................................. 48
Power-Down Modes ................................................................... 48
SPI/I2C Port Selection ................................................................ 50
I2C Serial Port Operation ........................................................... 50
SPI Serial Port Operation ........................................................... 53
SPI Instruction Word (16 Bits) .................................................. 54
SPI MSB/LSB First Transfers ..................................................... 54
Power-On Reset ....................................................................... 48
Hardware Reset via the RESET Pin ...................................... 48
Soft Reset via the Serial Port.................................................. 48
Soft Reset to Settings in EEPROM when EEPROM Pin = 0 via
the Serial Port .......................................................................... 48
Chip Power-Down via PD ..................................................... 48
PLL Power-Down .................................................................... 49
Distribution Power-Down ..................................................... 49
Individual Clock Output Power-Down ................................ 49
Individual Clock Channel Power-Down ............................. 49
I
Data Transfer Process ............................................................. 51
Data Transfer Format ............................................................. 52
I2C Serial Port Timing ............................................................ 52
Pin Descriptions ...................................................................... 53
SPI Mode Operation ............................................................... 53
Communication Cycle—Instruction Plus Data .................. 53
Write ......................................................................................... 53
Read .......................................................................................... 53
2
C Bus Characteristics ........................................................... 50
Rev. 0 | Page 3 of 84
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
EEPROM Operations ..................................................................... 57
Thermal Performance ..................................................................... 60
Register Map .................................................................................... 61
Register Map Descriptions ............................................................. 66
Applications Information ............................................................... 80
Outline Dimensions ........................................................................ 82
Writing to the EEPROM ............................................................ 57
Reading from the EEPROM ...................................................... 57
Programming the EEPROM Buffer Segment.......................... 58
Frequency Planning Using the AD9522 .................................. 80
Using the AD9522 Outputs for ADC Clock Applications .... 80
LVDS Clock Distribution ........................................................... 80
CMOS Clock Distribution ......................................................... 81
Ordering Guide ........................................................................... 82
Register Section Definition Group ....................................... 58
IO_UPDATE (Operational Code 0x80) .............................. 58
End-of-Data (Operational Code 0xFF) ............................... 58
Pseudo-End-of-Data (Operational Code 0xFE) ................. 58
AD9522-1
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

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