AD9874ABSTRL Analog Devices Inc, AD9874ABSTRL Datasheet - Page 14

• Manufacturer Part Number: AD9874ABSTRL
• Description: IC,RF/Baseband Circuit,BICMOS,QFP,48PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of AD9874ABSTRL

• Rohs Status: RoHS non-compliant
• Function: IF Digitizing Subsystem
• Frequency: 10MHz ~ 300MHz
• Rf Type: UHF, Cellular, TETRA, GSM, EDGE, APCO25
• Secondary Attributes: 16dB Front End Attenuator
• Package / Case: 48-LQFP
• For Use With: AD9874-EB - BOARD EVAL FOR AD9874
• Lead Free Status / Rohs Status: Compliant

AD9874
Address Bit
(Hex)
CLOCK SYNTHESIZER
0x10
0x11
0x12
0x13
0x14
0x15
0x16
SSI CONTROL
0x18
0x19
0x1A
ADC TUNING
0x1C
0x1D
0x1E
0x1F
TEST REGISTERS AND SPI PORT READ ENABLE
0x37–
0x39
0x3A
0x3B
0x3C–
0x3E
0x3F
Breakdown
(5:0)
(7:0)
(4:0)
(7:0)
(6)
(5)
(4:2)
(1:0)
(5:0)
(7:0)
(7:0)
(7:0)
(3:0)
(1)
(0)
(2:0)
(5:0)
(7:0)
(7:0)
(7:4, 2:0)
(3)
(7:4, 2:0)
(3)
(7:0)
(7:0)
Width
6
8
5
8
1
1
3
2
6
8
8
8
4
1
1
3
6
8
8
7
1
7
1
1
8
Default Value
00
0x38
0x00
0x3C
0
0
0
3
0x0
0x04
0x12
0x07
1
0
0
0
0x00
0x00
0x00
0x0
0
0x0
0
0x00
Subject to
Change
Table I. SPI Address Map (continued)
Name
CKR(13:8) Reference Frequency Divisor (6 MSB of a 14-Bit Word).
CKR(7:0)
CKN(12:8) Synthesized Frequency Divisor (5 MSB of a 13-Bit Word).
CKN(7:0) Synthesized Frequency Divisor (8 LSB of a 13-Bit Word).
CKF
CKINV
CKI
CKTM
CKFA(13:8) CK Fast Acquire Time Unit (6 MSB of a 14-Bit Word).
CKFA(7:0) CK Fast Acquire Time Unit (8 LSB of a 14-Bit Word).
SSICRA
SSICRB
SSIORD
TUNE_LC Perform tuning on the LC portion of the ADC (cleared when done).
TUNE_RC Perform tuning on the RC portion of the ADC (cleared when done).
CAPL1(2:0) Coarse Capacitance Setting for LC Tank (LSB is 25 pF, Differential).
CAPL0(5:0) Fine Capacitance Setting for LC Tank (LSB is 0.4 pF, Differential).
CAPR
TEST
TEST
SPIREN
TEST
TRI
TEST
ID
–14–
Description
Reference Frequency Divisor (8 LSB of a 14-Bit Word).
Default yields 300 kHz from f
Default yields 300 kHz from f
Enable fast acquire.
Invert charge pump (0 = source current to increase VCO frequency).
Charge Pump Current in Normal Operation. I
Manual Control of CLK Charge Pump (0 = Off, 1 = Up, 2 = Down,
3 = Normal).
SSI Control Register A. See Table III. (Default is FS and CLKOUT
three-stated.)
SSI Control Register B. See Table III. (16-bit data, maximum drive strength.)
Output Rate Divisor. f
Capacitance Setting for RC Resonator (64 LSB of Fixed Capacitance).
Factory Test Mode. Do not use.
Factory Test Mode. Do not use.
Enable read from SPI port.
Factory Test Mode. Do not use.
Three-state DOUTB.
Factory Test Mode. Do not use.
Revision ID (Read-Only); A write of 0x99 to this register is equivalent to
a power-on reset.
CLKOUT
REF
CLK
= f
CLK
=16.8 MHz; Min = 3, Max = 16383.
= 18 MHz; Min = 3, Max = 8191.
/SSIORD.
PUMP
= (CKI + 1)
0.625 mA.
REV. A