AD9874ABSTRL Analog Devices Inc, AD9874ABSTRL Datasheet - Page 37

IC,RF/Baseband Circuit,BICMOS,QFP,48PIN,PLASTIC

AD9874ABSTRL

Manufacturer Part Number
AD9874ABSTRL
Description
IC,RF/Baseband Circuit,BICMOS,QFP,48PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9874ABSTRL

Rohs Status
RoHS non-compliant
Function
IF Digitizing Subsystem
Frequency
10MHz ~ 300MHz
Rf Type
UHF, Cellular, TETRA, GSM, EDGE, APCO25
Secondary Attributes
16dB Front End Attenuator
Package / Case
48-LQFP
For Use With
AD9874-EB - BOARD EVAL FOR AD9874
Lead Free Status / Rohs Status
Compliant
Split Path Rx Architecture
A split path Rx architecture may be attractive for those applica-
tions whose instantaneous dynamic range requirements exceed
the capability of a single AD9874 device. To cope with these
higher dynamic range requirements, two AD9874s can be oper-
ated in parallel with their respective clip points offset by a fixed
amount. Adding a fixed amount of attenuation in front of the
AD9874 and/or programming the attenuation setting of its
internal VGA can adjust the input-referred clip point. To save
power and simplify hardware, the LO and CLK circuits of the
device can also be shared. Connecting the SYNCB pins of the two
devices and pulsing this line low synchronizes the two devices.
An example of this concept for possible use in a GSM base station
is shown in Figure 29. The signal chain consists of a high linearity
RF front end and IF stage followed by two AD9874s operating in
parallel. The RF front end consists of a duplexer and preselect
filter to pass the GSM RF band of interest. A high performance
LNA isolates the duplexer from the preselect filter while providing
sufficient gain to minimize system NF. An RF mixer is used to
downconvert the entire GSM band to a suitable IF, where much of
the channel selectivity is accomplished. The 170.6 MHz IF is
chosen to avoid any self-induced spurs from the AD9874. The IF
REV. A
GAIN = –2dB
NF = 2dB
DUPLEXER PRESELECT
Figure 29. Example of Split Path Rx Architecture to Increase Receiver Dynamic Range Capabilities
LNA
GAIN = 22dB
NF = 1dB
GAIN = –3dB
NF = 3dB
MIXER
X
GAIN = 5dB
NF = 12dB
IF SAW 1
ATTENUATED PATH WITH
CLIP POINT = 7.0dBm
GAIN = 15dB
NF = 2dB
IF
AMP
CLIP POINT = –17dBm
DIRECT PATH WITH
IF SAW 2
GAIN = –9dB
NF = –9dB
–37–
0.1 F
36dB
PAD
stage consists of two SAW filters isolated by a 15 dB gain stage.
The cascaded SAW filter response must provide sufficient
blocker rejection in order for the receiver to meet its sensitivity
requirements under worst-case blocker conditions. A composite
response having 27 dB, 60 dB, and 100 dB rejection at frequency
offsets of 0.8 MHz,
provides enough blocker suppression to ensure that the AD9874
with the lower clip point will not be overdriven by any blocker.
This configuration results in the best possible receiver sensitivity
under all blocking conditions.
The output of the last SAW filters drives the two AD9874s via a
direct signal path and an attenuated signal path. The direct path
corresponds to the AD9874 having the lowest clip point and
provides the highest receiver sensitivity with a system noise
figure of 4.7 dB. The VGA of this device is set for maximum
attenuation, so its clip point is approximately –17 dBm. Since
conversion gain from the antenna to the AD9874 is 19 dB, the
digital output of this path will nominally be selected unless the
target signal’s power exceeds –36 dBm at the antenna. The
attenuated path corresponds to the AD9874 having the highest
input-referred clip point, and its digital output point of this path
is set to 7 dBm by inserting a 30 dB attenuator and setting the
AD9874’s VGA to the middle of its 12 dB range. This setting
VDDC
R
L
BIAS
OSC
C
OSC
VCO
C
R D
VAR
47
43
42
19
20
19
20
47
43
42
CLKP
CLKN
IFIN
LOP
LON
CLKN
IFIN
LOP
LON
FILTER
CLKP
LOOP
C
C
P
Z
1.6 MHz, and 6.5 MHz, respectively,
AD9874
R
AD9874
SLAVE
MASTER
F
IOUTC
IOUTL
IOUTC
15
38
15
FILTER
LOOP
CLKOUT
CLKOUT
DOUTA
DOUTA
SYNCB
SYNCB
f
f
REF
REF
PD
FS
PC
PE
PC
FS
PE
PD
35
25
24
23
33
31
29
28
35
31
29
28
25
24
23
33
13MHz
AD9874
ASIC
DSP
OR

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